cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From 66307f9e693bd4822a683fac8cf1f63533822c18 Mon Sep 17 00:00:00 2001
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Date: Thu, 3 May 2018 18:05:43 +0300
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Subject: [PATCH] arm64: dts: ls104xa: set mask to drop TBU ID from StreamID
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The StreamID entering the SMMU is actually a concatenation of the
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SMMU TBU ID and the ICID configured in software.
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Since the TBU ID is internal to the SoC and since we want that the
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actual the ICID configured in software to enter the SMMU witout any
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additional set bits, mask out the TBU ID bits and leave only the
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relevant ICID bits to enter SMMU.
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
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arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
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2 files changed, 2 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@@ -230,6 +230,7 @@
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compatible = "arm,mmu-500";
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reg = <0 0x9000000 0 0x400000>;
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dma-coherent;
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+ stream-match-mask = <0x7f00>;
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#global-interrupts = <2>;
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#iommu-cells = <1>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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@@ -233,6 +233,7 @@
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compatible = "arm,mmu-500";
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reg = <0 0x9000000 0 0x400000>;
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dma-coherent;
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+ stream-match-mask = <0x7f00>;
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#global-interrupts = <2>;
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#iommu-cells = <1>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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