f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
210 lines
4.1 KiB
Diff
210 lines
4.1 KiB
Diff
From 00f01136b1c165e0f4a190fcb5ec8aa11428362f Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.org>
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Date: Mon, 9 Dec 2019 12:32:20 +0000
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Subject: [PATCH] overlays: Make mcp342x run-time compatible
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The order of processing of run-time overlays differs from that done by
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the firmware. This means that certain parameter processing techniques
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are not compatible with run-time use. The mcp342x overlay is one such
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overlay, but it is easy to change the implementation without changing
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the interface.
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See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=258294
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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.../arm/boot/dts/overlays/mcp342x-overlay.dts | 133 ++++++++++++++----
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1 file changed, 102 insertions(+), 31 deletions(-)
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--- a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
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@@ -8,14 +8,15 @@
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fragment@0 {
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target = <&i2c1>;
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- __overlay__ {
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+ __dormant__ {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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- mcp342x: mcp@68 {
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+ mcp3421: mcp@68 {
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reg = <0x68>;
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+ compatible = "microchip,mcp3421";
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status = "okay";
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};
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@@ -23,71 +24,141 @@
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};
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fragment@1 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3421";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3422: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3422";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@2 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3422";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3423: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3423";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@3 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3423";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3424: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3424";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@4 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3424";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3425: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3425","mcp3425";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@5 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3425";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3426: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3426";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@6 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3426";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ status = "okay";
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+
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+ mcp3427: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3427";
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+
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+ status = "okay";
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+ };
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};
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};
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fragment@7 {
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- target = <&mcp342x>;
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+ target = <&i2c1>;
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__dormant__ {
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- compatible = "microchip,mcp3427";
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- };
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- };
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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- fragment@8 {
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- target = <&mcp342x>;
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- __dormant__ {
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- compatible = "microchip,mcp3428";
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+ status = "okay";
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+
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+ mcp3428: mcp@68 {
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+ reg = <0x68>;
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+ compatible = "microchip,mcp3428";
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+
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+ status = "okay";
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+ };
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};
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};
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__overrides__ {
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- addr = <&mcp342x>,"reg:0";
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- mcp3421 = <0>,"=1";
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- mcp3422 = <0>,"=2";
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- mcp3423 = <0>,"=3";
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- mcp3424 = <0>,"=4";
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- mcp3425 = <0>,"=5";
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- mcp3426 = <0>,"=6";
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- mcp3427 = <0>,"=7";
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- mcp3428 = <0>,"=8";
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+ addr = <&mcp3421>,"reg:0",
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+ <&mcp3422>,"reg:0",
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+ <&mcp3423>,"reg:0",
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+ <&mcp3424>,"reg:0",
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+ <&mcp3425>,"reg:0",
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+ <&mcp3426>,"reg:0",
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+ <&mcp3427>,"reg:0",
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+ <&mcp3428>,"reg:0";
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+ mcp3421 = <0>,"=0";
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+ mcp3422 = <0>,"=1";
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+ mcp3423 = <0>,"=2";
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+ mcp3424 = <0>,"=3";
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+ mcp3425 = <0>,"=4";
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+ mcp3426 = <0>,"=5";
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+ mcp3427 = <0>,"=6";
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+ mcp3428 = <0>,"=7";
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};
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};
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