f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
136 lines
4.0 KiB
Diff
136 lines
4.0 KiB
Diff
From cbda8e6de54f8a0f194e990f53e1cfad642af1be Mon Sep 17 00:00:00 2001
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From: Chris Miller <chris@mesl2.co.uk>
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Date: Wed, 26 Jun 2019 10:40:30 +0100
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Subject: [PATCH] drm: vc4_dsi: Fix DMA channel and memory leak in vc4
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(#3012)
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Signed-off-by: Chris G Miller <chris@creative-electronics.net>
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---
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drivers/gpu/drm/vc4/vc4_dsi.c | 35 ++++++++++++++++++++++++-----------
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1 file changed, 24 insertions(+), 11 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_dsi.c
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+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -1485,9 +1485,11 @@ static int vc4_dsi_bind(struct device *d
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/* DSI1 has a broken AXI slave that doesn't respond to writes
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* from the ARM. It does handle writes from the DMA engine,
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* so set up a channel for talking to it.
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+ * Where possible managed resource providers are used, but the DMA channel
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+ * must - if acquired - be explicitly released prior to taking an error exit path.
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*/
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if (dsi->port == 1) {
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- dsi->reg_dma_mem = dma_alloc_coherent(dev, 4,
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+ dsi->reg_dma_mem = dmam_alloc_coherent(dev, 4,
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&dsi->reg_dma_paddr,
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GFP_KERNEL);
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if (!dsi->reg_dma_mem) {
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@@ -1506,6 +1508,8 @@ static int vc4_dsi_bind(struct device *d
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return ret;
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}
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+ /* From here on, any error exits must release the dma channel */
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+
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/* Get the physical address of the device's registers. The
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* struct resource for the regs gives us the bus address
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* instead.
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@@ -1532,7 +1536,7 @@ static int vc4_dsi_bind(struct device *d
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if (ret) {
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to get interrupt: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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dsi->escape_clock = devm_clk_get(dev, "escape");
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@@ -1540,7 +1544,7 @@ static int vc4_dsi_bind(struct device *d
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ret = PTR_ERR(dsi->escape_clock);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to get escape clock: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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dsi->pll_phy_clock = devm_clk_get(dev, "phy");
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@@ -1548,7 +1552,7 @@ static int vc4_dsi_bind(struct device *d
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ret = PTR_ERR(dsi->pll_phy_clock);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to get phy clock: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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dsi->pixel_clock = devm_clk_get(dev, "pixel");
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@@ -1556,7 +1560,7 @@ static int vc4_dsi_bind(struct device *d
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ret = PTR_ERR(dsi->pixel_clock);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to get pixel clock: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
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@@ -1571,26 +1575,28 @@ static int vc4_dsi_bind(struct device *d
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if (ret == -ENODEV)
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return 0;
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- return ret;
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+ goto rel_dma_exit;
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}
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if (panel) {
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dsi->bridge = devm_drm_panel_bridge_add(dev, panel,
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DRM_MODE_CONNECTOR_DSI);
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- if (IS_ERR(dsi->bridge))
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- return PTR_ERR(dsi->bridge);
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+ if (IS_ERR(dsi->bridge)){
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+ ret = PTR_ERR(dsi->bridge);
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+ goto rel_dma_exit;
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+ }
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}
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/* The esc clock rate is supposed to always be 100Mhz. */
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ret = clk_set_rate(dsi->escape_clock, 100 * 1000000);
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if (ret) {
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dev_err(dev, "Failed to set esc clock: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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ret = vc4_dsi_init_phy_clocks(dsi);
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if (ret)
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- return ret;
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+ goto rel_dma_exit;
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if (dsi->port == 1)
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vc4->dsi1 = dsi;
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@@ -1602,7 +1608,7 @@ static int vc4_dsi_bind(struct device *d
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ret = drm_bridge_attach(dsi->encoder, dsi->bridge, NULL);
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if (ret) {
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dev_err(dev, "bridge attach failed: %d\n", ret);
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- return ret;
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+ goto rel_dma_exit;
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}
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/* Disable the atomic helper calls into the bridge. We
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* manually call the bridge pre_enable / enable / etc. calls
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@@ -1619,6 +1625,11 @@ static int vc4_dsi_bind(struct device *d
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pm_runtime_enable(dev);
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return 0;
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+
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+rel_dma_exit:
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+ dma_release_channel(dsi->reg_dma_chan);
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+
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+ return ret;
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}
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static void vc4_dsi_unbind(struct device *dev, struct device *master,
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@@ -1633,6 +1644,8 @@ static void vc4_dsi_unbind(struct device
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vc4_dsi_encoder_destroy(dsi->encoder);
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+ dma_release_channel(dsi->reg_dma_chan);
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+
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if (dsi->port == 1)
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vc4->dsi1 = NULL;
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}
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