f5affd4f36
SVN-Revision: 15918
773 lines
20 KiB
C
773 lines
20 KiB
C
/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
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*
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* Copyright (C) 2006-2007 by Openmoko, Inc.
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* Author: Harald Welte <laforge@openmoko.org>,
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* Stefan Schmidt <stefan@openmoko.org>
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* Copyright (C) 2008 by Harald Welte <laforge@openmoko.org>
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/jbt6k74.h>
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#include <linux/fb.h>
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#include <linux/time.h>
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enum jbt_register {
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JBT_REG_SLEEP_IN = 0x10,
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JBT_REG_SLEEP_OUT = 0x11,
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JBT_REG_DISPLAY_OFF = 0x28,
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JBT_REG_DISPLAY_ON = 0x29,
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JBT_REG_RGB_FORMAT = 0x3a,
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JBT_REG_QUAD_RATE = 0x3b,
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JBT_REG_POWER_ON_OFF = 0xb0,
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JBT_REG_BOOSTER_OP = 0xb1,
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JBT_REG_BOOSTER_MODE = 0xb2,
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JBT_REG_BOOSTER_FREQ = 0xb3,
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JBT_REG_OPAMP_SYSCLK = 0xb4,
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JBT_REG_VSC_VOLTAGE = 0xb5,
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JBT_REG_VCOM_VOLTAGE = 0xb6,
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JBT_REG_EXT_DISPL = 0xb7,
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JBT_REG_OUTPUT_CONTROL = 0xb8,
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JBT_REG_DCCLK_DCEV = 0xb9,
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JBT_REG_DISPLAY_MODE1 = 0xba,
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JBT_REG_DISPLAY_MODE2 = 0xbb,
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JBT_REG_DISPLAY_MODE = 0xbc,
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JBT_REG_ASW_SLEW = 0xbd,
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JBT_REG_DUMMY_DISPLAY = 0xbe,
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JBT_REG_DRIVE_SYSTEM = 0xbf,
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JBT_REG_SLEEP_OUT_FR_A = 0xc0,
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JBT_REG_SLEEP_OUT_FR_B = 0xc1,
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JBT_REG_SLEEP_OUT_FR_C = 0xc2,
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JBT_REG_SLEEP_IN_LCCNT_D = 0xc3,
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JBT_REG_SLEEP_IN_LCCNT_E = 0xc4,
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JBT_REG_SLEEP_IN_LCCNT_F = 0xc5,
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JBT_REG_SLEEP_IN_LCCNT_G = 0xc6,
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JBT_REG_GAMMA1_FINE_1 = 0xc7,
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JBT_REG_GAMMA1_FINE_2 = 0xc8,
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JBT_REG_GAMMA1_INCLINATION = 0xc9,
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JBT_REG_GAMMA1_BLUE_OFFSET = 0xca,
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/* VGA */
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JBT_REG_BLANK_CONTROL = 0xcf,
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JBT_REG_BLANK_TH_TV = 0xd0,
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JBT_REG_CKV_ON_OFF = 0xd1,
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JBT_REG_CKV_1_2 = 0xd2,
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JBT_REG_OEV_TIMING = 0xd3,
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JBT_REG_ASW_TIMING_1 = 0xd4,
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JBT_REG_ASW_TIMING_2 = 0xd5,
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/* QVGA */
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JBT_REG_BLANK_CONTROL_QVGA = 0xd6,
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JBT_REG_BLANK_TH_TV_QVGA = 0xd7,
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JBT_REG_CKV_ON_OFF_QVGA = 0xd8,
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JBT_REG_CKV_1_2_QVGA = 0xd9,
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JBT_REG_OEV_TIMING_QVGA = 0xde,
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JBT_REG_ASW_TIMING_1_QVGA = 0xdf,
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JBT_REG_ASW_TIMING_2_QVGA = 0xe0,
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JBT_REG_HCLOCK_VGA = 0xec,
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JBT_REG_HCLOCK_QVGA = 0xed,
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};
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enum jbt_state {
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JBT_STATE_DEEP_STANDBY,
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JBT_STATE_SLEEP,
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JBT_STATE_NORMAL,
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JBT_STATE_QVGA_NORMAL,
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};
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static const char *jbt_state_names[] = {
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[JBT_STATE_DEEP_STANDBY] = "deep-standby",
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[JBT_STATE_SLEEP] = "sleep",
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[JBT_STATE_NORMAL] = "normal",
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[JBT_STATE_QVGA_NORMAL] = "qvga-normal",
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};
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struct jbt_info {
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enum jbt_state state, normal_state;
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struct spi_device *spi_dev;
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struct mutex lock; /* protects tx_buf and reg_cache */
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struct notifier_block fb_notif;
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u16 tx_buf[8];
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u16 reg_cache[0xEE];
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struct timespec last_sleep;
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};
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#define JBT_COMMAND 0x000
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#define JBT_DATA 0x100
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static inline unsigned int timespec_sub_ms(struct timespec lhs,
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struct timespec rhs)
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{
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struct timespec ts = timespec_sub(lhs, rhs);
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return (ts.tv_sec * MSEC_PER_SEC) + (ts.tv_nsec / NSEC_PER_MSEC);
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}
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static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg)
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{
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int rc;
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jbt->tx_buf[0] = JBT_COMMAND | reg;
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rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
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1*sizeof(u16));
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if (rc == 0)
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jbt->reg_cache[reg] = 0;
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else
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printk(KERN_ERR"jbt_reg_write_nodata spi_write ret %d\n",
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rc);
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return rc;
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}
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static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data)
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{
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int rc;
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jbt->tx_buf[0] = JBT_COMMAND | reg;
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jbt->tx_buf[1] = JBT_DATA | data;
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rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
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2*sizeof(u16));
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if (rc == 0)
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jbt->reg_cache[reg] = data;
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else
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printk(KERN_ERR"jbt_reg_write spi_write ret %d\n", rc);
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return rc;
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}
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static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data)
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{
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int rc;
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jbt->tx_buf[0] = JBT_COMMAND | reg;
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jbt->tx_buf[1] = JBT_DATA | (data >> 8);
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jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
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rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
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3*sizeof(u16));
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if (rc == 0)
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jbt->reg_cache[reg] = data;
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else
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printk(KERN_ERR"jbt_reg_write16 spi_write ret %d\n", rc);
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return rc;
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}
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static int jbt_init_regs(struct jbt_info *jbt)
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{
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int rc;
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dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n",
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jbt->normal_state == JBT_STATE_QVGA_NORMAL ? 'Q' : ' ');
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rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
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rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
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rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
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rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
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rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
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rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
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rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
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rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
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rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
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rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
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rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
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rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
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/*
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* default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
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* to avoid red / blue flicker
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*/
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rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04);
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rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
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rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
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rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
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rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
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rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
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rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
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rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
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rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
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rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
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rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
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rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
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rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
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if (jbt->normal_state != JBT_STATE_QVGA_NORMAL) {
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rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
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rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
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rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
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rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
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rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
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rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
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rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
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rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
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} else {
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rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
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rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
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rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
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rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
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rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
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rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
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rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
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rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
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}
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return rc ? -EIO : 0;
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}
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static int standby_to_sleep(struct jbt_info *jbt)
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{
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int rc;
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/* three times command zero */
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rc = jbt_reg_write_nodata(jbt, 0x00);
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mdelay(1);
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rc |= jbt_reg_write_nodata(jbt, 0x00);
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mdelay(1);
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rc |= jbt_reg_write_nodata(jbt, 0x00);
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mdelay(1);
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/* deep standby out */
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rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x11);
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mdelay(1);
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rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x28);
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/* (re)initialize register set */
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rc |= jbt_init_regs(jbt);
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return rc ? -EIO : 0;
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}
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static int sleep_to_normal(struct jbt_info *jbt)
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{
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int rc;
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/* Make sure we are 120 ms after SLEEP_OUT */
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unsigned int sleep_time = timespec_sub_ms(current_kernel_time(),
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jbt->last_sleep);
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if (sleep_time < 120)
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mdelay(120 - sleep_time);
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if (jbt->normal_state == JBT_STATE_NORMAL) {
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/* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
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rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
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/* Quad mode off */
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rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
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} else {
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/* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
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rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
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/* Quad mode on */
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rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
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}
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/* AVDD on, XVDD on */
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rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
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/* Output control */
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rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
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/* Turn on display */
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rc |= jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
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/* Sleep mode off */
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rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
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jbt->last_sleep = current_kernel_time();
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/* Allow the booster and display controller to restart stably */
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mdelay(5);
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return rc ? -EIO : 0;
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}
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static int normal_to_sleep(struct jbt_info *jbt)
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{
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int rc;
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/* Make sure we are 120 ms after SLEEP_OUT */
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unsigned int sleep_time = timespec_sub_ms(current_kernel_time(),
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jbt->last_sleep);
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if (sleep_time < 120)
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mdelay(120 - sleep_time);
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rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
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rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
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rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
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jbt->last_sleep = current_kernel_time();
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/* Allow the internal circuits to stop automatically */
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mdelay(5);
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return rc ? -EIO : 0;
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}
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static int sleep_to_standby(struct jbt_info *jbt)
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{
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return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
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}
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/* frontend function */
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int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state)
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{
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int rc = -EINVAL;
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/* dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%s, new_state=%s)\n",
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jbt_state_names[jbt->state],
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jbt_state_names[new_state]);*/
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/* printk("entering (old_state=%s, new_state=%s)\n",
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jbt_state_names[jbt->state],
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jbt_state_names[new_state]);*/
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mutex_lock(&jbt->lock);
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if (new_state == JBT_STATE_NORMAL ||
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new_state == JBT_STATE_QVGA_NORMAL)
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jbt->normal_state = new_state;
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switch (jbt->state) {
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case JBT_STATE_DEEP_STANDBY:
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switch (new_state) {
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case JBT_STATE_DEEP_STANDBY:
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rc = 0;
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break;
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case JBT_STATE_SLEEP:
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rc = standby_to_sleep(jbt);
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break;
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case JBT_STATE_NORMAL:
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/* first transition into sleep */
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rc = standby_to_sleep(jbt);
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/* then transition into normal */
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rc |= sleep_to_normal(jbt);
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break;
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case JBT_STATE_QVGA_NORMAL:
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/* first transition into sleep */
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rc = standby_to_sleep(jbt);
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/* then transition into normal */
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rc |= sleep_to_normal(jbt);
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break;
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}
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break;
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case JBT_STATE_SLEEP:
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switch (new_state) {
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case JBT_STATE_SLEEP:
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rc = 0;
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break;
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case JBT_STATE_DEEP_STANDBY:
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rc = sleep_to_standby(jbt);
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break;
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case JBT_STATE_NORMAL:
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case JBT_STATE_QVGA_NORMAL:
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rc = sleep_to_normal(jbt);
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break;
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}
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break;
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case JBT_STATE_NORMAL:
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switch (new_state) {
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case JBT_STATE_NORMAL:
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rc = 0;
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break;
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case JBT_STATE_DEEP_STANDBY:
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/* first transition into sleep */
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rc = normal_to_sleep(jbt);
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/* then transition into deep standby */
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rc |= sleep_to_standby(jbt);
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break;
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case JBT_STATE_SLEEP:
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rc = normal_to_sleep(jbt);
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break;
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case JBT_STATE_QVGA_NORMAL:
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/* first transition into sleep */
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rc = normal_to_sleep(jbt);
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/* second transition into deep standby */
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rc |= sleep_to_standby(jbt);
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/* third transition into sleep */
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rc |= standby_to_sleep(jbt);
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/* fourth transition into normal */
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rc |= sleep_to_normal(jbt);
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break;
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}
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break;
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case JBT_STATE_QVGA_NORMAL:
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switch (new_state) {
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case JBT_STATE_QVGA_NORMAL:
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rc = 0;
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break;
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|
case JBT_STATE_DEEP_STANDBY:
|
|
/* first transition into sleep */
|
|
rc = normal_to_sleep(jbt);
|
|
/* then transition into deep standby */
|
|
rc |= sleep_to_standby(jbt);
|
|
break;
|
|
case JBT_STATE_SLEEP:
|
|
rc = normal_to_sleep(jbt);
|
|
break;
|
|
case JBT_STATE_NORMAL:
|
|
/* first transition into sleep */
|
|
rc = normal_to_sleep(jbt);
|
|
/* second transition into deep standby */
|
|
rc |= sleep_to_standby(jbt);
|
|
/* third transition into sleep */
|
|
rc |= standby_to_sleep(jbt);
|
|
/* fourth transition into normal */
|
|
rc |= sleep_to_normal(jbt);
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
|
|
if (rc == 0)
|
|
jbt->state = new_state;
|
|
else
|
|
dev_err(&jbt->spi_dev->dev, "Failed enter state '%s')\n",
|
|
jbt_state_names[new_state]);
|
|
|
|
mutex_unlock(&jbt->lock);
|
|
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL_GPL(jbt6k74_enter_state);
|
|
|
|
static ssize_t state_read(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(dev);
|
|
|
|
if (jbt->state >= ARRAY_SIZE(jbt_state_names))
|
|
return -EIO;
|
|
|
|
return sprintf(buf, "%s\n", jbt_state_names[jbt->state]);
|
|
}
|
|
|
|
static ssize_t state_write(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(dev);
|
|
int i, rc;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) {
|
|
if (!strncmp(buf, jbt_state_names[i],
|
|
strlen(jbt_state_names[i]))) {
|
|
rc = jbt6k74_enter_state(jbt, i);
|
|
if (rc)
|
|
return rc;
|
|
return count;
|
|
}
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static DEVICE_ATTR(state, 0644, state_read, state_write);
|
|
|
|
static int reg_by_string(const char *name)
|
|
{
|
|
if (!strcmp(name, "gamma_fine1"))
|
|
return JBT_REG_GAMMA1_FINE_1;
|
|
else if (!strcmp(name, "gamma_fine2"))
|
|
return JBT_REG_GAMMA1_FINE_2;
|
|
else if (!strcmp(name, "gamma_inclination"))
|
|
return JBT_REG_GAMMA1_INCLINATION;
|
|
else
|
|
return JBT_REG_GAMMA1_BLUE_OFFSET;
|
|
}
|
|
|
|
static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(dev);
|
|
int reg = reg_by_string(attr->attr.name);
|
|
u16 val;
|
|
|
|
mutex_lock(&jbt->lock);
|
|
val = jbt->reg_cache[reg];
|
|
mutex_unlock(&jbt->lock);
|
|
|
|
return sprintf(buf, "0x%04x\n", val);
|
|
}
|
|
|
|
static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(dev);
|
|
int reg = reg_by_string(attr->attr.name);
|
|
unsigned long val = simple_strtoul(buf, NULL, 10);
|
|
|
|
dev_info(dev, "writing gama %lu\n", val & 0xff);
|
|
|
|
mutex_lock(&jbt->lock);
|
|
jbt_reg_write(jbt, reg, val & 0xff);
|
|
mutex_unlock(&jbt->lock);
|
|
|
|
return count;
|
|
}
|
|
|
|
static ssize_t reset_write(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
int rc;
|
|
struct jbt_info *jbt = dev_get_drvdata(dev);
|
|
struct jbt6k74_platform_data *pdata = jbt->spi_dev->dev.platform_data;
|
|
|
|
dev_info(dev, "reset\n");
|
|
|
|
mutex_lock(&jbt->lock);
|
|
|
|
jbt->state = JBT_STATE_DEEP_STANDBY;
|
|
|
|
/* hard reset the jbt6k74 */
|
|
(pdata->reset)(0, 0);
|
|
mdelay(1);
|
|
(pdata->reset)(0, 1);
|
|
mdelay(120);
|
|
|
|
rc = jbt_reg_write_nodata(jbt, 0x01);
|
|
if (rc < 0)
|
|
dev_err(&jbt->spi_dev->dev, "cannot soft reset\n");
|
|
mdelay(120);
|
|
|
|
mutex_unlock(&jbt->lock);
|
|
|
|
jbt6k74_enter_state(jbt, jbt->normal_state);
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
|
|
static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
|
|
static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
|
|
static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
|
|
static DEVICE_ATTR(reset, 0600, NULL, reset_write);
|
|
|
|
static struct attribute *jbt_sysfs_entries[] = {
|
|
&dev_attr_state.attr,
|
|
&dev_attr_gamma_fine1.attr,
|
|
&dev_attr_gamma_fine2.attr,
|
|
&dev_attr_gamma_inclination.attr,
|
|
&dev_attr_gamma_blue_offset.attr,
|
|
&dev_attr_reset.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group jbt_attr_group = {
|
|
.name = NULL,
|
|
.attrs = jbt_sysfs_entries,
|
|
};
|
|
|
|
static int fb_notifier_callback(struct notifier_block *self,
|
|
unsigned long event, void *data)
|
|
{
|
|
struct jbt_info *jbt;
|
|
struct fb_event *evdata = data;
|
|
int fb_blank;
|
|
|
|
jbt = container_of(self, struct jbt_info, fb_notif);
|
|
|
|
dev_dbg(&jbt->spi_dev->dev, "event=%lu\n", event);
|
|
|
|
if (event != FB_EVENT_BLANK && event != FB_EVENT_CONBLANK)
|
|
return 0;
|
|
|
|
fb_blank = *(int *)evdata->data;
|
|
switch (fb_blank) {
|
|
case FB_BLANK_UNBLANK:
|
|
dev_dbg(&jbt->spi_dev->dev, "unblank\n");
|
|
jbt6k74_enter_state(jbt, jbt->normal_state);
|
|
break;
|
|
case FB_BLANK_NORMAL:
|
|
dev_dbg(&jbt->spi_dev->dev, "blank\n");
|
|
break;
|
|
case FB_BLANK_VSYNC_SUSPEND:
|
|
dev_dbg(&jbt->spi_dev->dev, "vsync suspend\n");
|
|
break;
|
|
case FB_BLANK_HSYNC_SUSPEND:
|
|
dev_dbg(&jbt->spi_dev->dev, "hsync suspend\n");
|
|
break;
|
|
case FB_BLANK_POWERDOWN:
|
|
dev_dbg(&jbt->spi_dev->dev, "powerdown\n");
|
|
jbt6k74_enter_state(jbt, JBT_STATE_SLEEP);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* linux device model infrastructure */
|
|
|
|
static int __devinit jbt_probe(struct spi_device *spi)
|
|
{
|
|
int rc;
|
|
struct jbt_info *jbt;
|
|
struct jbt6k74_platform_data *pdata = spi->dev.platform_data;
|
|
|
|
/* the controller doesn't have a MISO pin; we can't do detection */
|
|
|
|
spi->mode = SPI_CPOL | SPI_CPHA;
|
|
spi->bits_per_word = 9;
|
|
|
|
rc = spi_setup(spi);
|
|
if (rc < 0) {
|
|
dev_err(&spi->dev,
|
|
"error during spi_setup of jbt6k74 driver\n");
|
|
return rc;
|
|
}
|
|
|
|
jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
|
|
if (!jbt)
|
|
return -ENOMEM;
|
|
|
|
jbt->spi_dev = spi;
|
|
jbt->normal_state = JBT_STATE_NORMAL;
|
|
jbt->state = JBT_STATE_DEEP_STANDBY;
|
|
jbt->last_sleep = current_kernel_time();
|
|
mutex_init(&jbt->lock);
|
|
|
|
dev_set_drvdata(&spi->dev, jbt);
|
|
|
|
rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
|
|
if (rc < 0) {
|
|
dev_err(&spi->dev, "cannot enter NORMAL state\n");
|
|
goto err_free_drvdata;
|
|
}
|
|
|
|
rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
|
|
if (rc < 0) {
|
|
dev_err(&spi->dev, "cannot create sysfs group\n");
|
|
goto err_standby;
|
|
}
|
|
|
|
jbt->fb_notif.notifier_call = fb_notifier_callback;
|
|
rc = fb_register_client(&jbt->fb_notif);
|
|
if (rc < 0) {
|
|
dev_err(&spi->dev, "cannot register notifier\n");
|
|
goto err_sysfs;
|
|
}
|
|
|
|
if (pdata->probe_completed)
|
|
(pdata->probe_completed)(&spi->dev);
|
|
|
|
return 0;
|
|
|
|
err_sysfs:
|
|
sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
|
|
err_standby:
|
|
jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
|
|
err_free_drvdata:
|
|
dev_set_drvdata(&spi->dev, NULL);
|
|
kfree(jbt);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int __devexit jbt_remove(struct spi_device *spi)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
|
|
|
|
/* We don't want to switch off the display in case the user
|
|
* accidentially onloads the module (whose use count normally is 0) */
|
|
jbt6k74_enter_state(jbt, jbt->normal_state);
|
|
|
|
fb_unregister_client(&jbt->fb_notif);
|
|
sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
|
|
dev_set_drvdata(&spi->dev, NULL);
|
|
kfree(jbt);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int jbt_suspend(struct spi_device *spi, pm_message_t state)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
|
|
|
|
jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
|
|
|
|
dev_info(&spi->dev, "suspended\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int jbt6k74_resume(struct spi_device *spi)
|
|
{
|
|
struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
|
|
struct jbt6k74_platform_data *pdata = spi->dev.platform_data;
|
|
|
|
jbt6k74_enter_state(jbt, jbt->normal_state);
|
|
|
|
if (pdata->resuming)
|
|
(pdata->resuming)(0);
|
|
|
|
dev_info(&spi->dev, "resumed\n");
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(jbt6k74_resume);
|
|
|
|
#else
|
|
#define jbt_suspend NULL
|
|
#define jbt6k74_resume NULL
|
|
#endif
|
|
|
|
static struct spi_driver jbt6k74_driver = {
|
|
.driver = {
|
|
.name = "jbt6k74",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
|
|
.probe = jbt_probe,
|
|
.remove = __devexit_p(jbt_remove),
|
|
.suspend = jbt_suspend,
|
|
.resume = jbt6k74_resume,
|
|
};
|
|
|
|
static int __init jbt_init(void)
|
|
{
|
|
return spi_register_driver(&jbt6k74_driver);
|
|
}
|
|
|
|
static void __exit jbt_exit(void)
|
|
{
|
|
spi_unregister_driver(&jbt6k74_driver);
|
|
}
|
|
|
|
MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
|
|
MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_init(jbt_init);
|
|
module_exit(jbt_exit);
|