Openwrt/target/linux/ramips/dts/mt7628an_tplink_tl-wr902ac-v3.dts
Chuanhong Guo b756ea2a90 ramips: replace pinctrl property names
Upstream pinctrl driver in drivers/staging uses
groups/function/ralink,num-gpios instead of
ralink,group/ralink,function/ralink,nr-gpio
Replace these properties in dts as well as the pinctrl driver in
patches-4.14.
This commit is created using:
sed -i 's/ralink,group/groups/g'
sed -i 's/ralink,function/function/g'
sed -i 's/ralink,nr-gpio/ralink,num-gpios/g'

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2020-04-12 22:29:17 +08:00

109 lines
1.8 KiB
Plaintext

/dts-v1/;
#include "mt7628an_tplink_8m.dtsi"
/ {
compatible = "tplink,tl-wr902ac-v3", "mediatek,mt7628an-soc";
model = "TP-Link TL-WR902AC v3";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
sw1 {
label = "sw1";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
sw2 {
label = "sw2";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
};
wps {
label = "wps";
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
lan {
label = "tl-wr902ac-v3:green:lan";
gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
};
led_power: power {
label = "tl-wr902ac-v3:green:power";
gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
usb {
label = "tl-wr902ac-v3:green:usb";
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
wan {
label = "tl-wr902ac-v3:green:wan";
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
};
wlan {
label = "tl-wr902ac-v3:green:wlan";
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
wps {
label = "tl-wr902ac-v3:green:wps";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
};
};
&state_default {
gpio {
groups = "i2c", "i2s", "p0led_an", "p2led_an", "p4led_an", "uart1", "wdt", "wled_an";
function = "gpio";
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x28000>;
ieee80211-freq-limit = <5000000 6000000>;
mtd-mac-address = <&factory 0xf100>;
mtd-mac-address-increment = <(-1)>;
};
};