196f3d586f
5.4.102 backported a lot of stuff that our WireGuard backport already did, in addition to other patches we had, so those patches were removed from that part of the series. In the process other patches were refreshed or reworked to account for upstream changes. This commit involved `update_kernel.sh -v -u 5.4`. Cc: John Audia <graysky@archlinux.us> Cc: David Bauer <mail@david-bauer.net> Cc: Petr Štetiar <ynezz@true.cz> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
80 lines
2.8 KiB
Diff
80 lines
2.8 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
|
|
Date: Sat, 4 Nov 2017 07:40:23 +0100
|
|
Subject: [PATCH] mtd: spi-nor: support limiting 4K sectors support based on
|
|
flash size
|
|
|
|
Some devices need 4K sectors to be able to deal with small flash chips.
|
|
For instance, w25x05 is 64 KiB in size, and without 4K sectors, the
|
|
entire chip is just one erase block.
|
|
On bigger flash chip sizes, using 4K sectors can significantly slow down
|
|
many operations, including using a writable filesystem. There are several
|
|
platforms where it makes sense to use a single kernel on both kinds of
|
|
devices.
|
|
|
|
To support this properly, allow configuring an upper flash chip size
|
|
limit for 4K sectors support.
|
|
|
|
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
|
---
|
|
|
|
--- a/drivers/mtd/spi-nor/Kconfig
|
|
+++ b/drivers/mtd/spi-nor/Kconfig
|
|
@@ -34,6 +34,17 @@ config SPI_ASPEED_SMC
|
|
and support for the SPI flash memory controller (SPI) for
|
|
the host firmware. The implementation only supports SPI NOR.
|
|
|
|
+config MTD_SPI_NOR_USE_4K_SECTORS_LIMIT
|
|
+ int "Maximum flash chip size to use 4K sectors on (in KiB)"
|
|
+ depends on MTD_SPI_NOR_USE_4K_SECTORS
|
|
+ default "4096"
|
|
+ help
|
|
+ There are many flash chips that support 4K sectors, but are so large
|
|
+ that using them significantly slows down writing large amounts of
|
|
+ data or using a writable filesystem.
|
|
+ Any flash chip larger than the size specified in this option will
|
|
+ not use 4K sectors.
|
|
+
|
|
config SPI_CADENCE_QUADSPI
|
|
tristate "Cadence Quad SPI controller"
|
|
depends on OF && (ARM || ARM64 || COMPILE_TEST)
|
|
--- a/drivers/mtd/spi-nor/spi-nor.c
|
|
+++ b/drivers/mtd/spi-nor/spi-nor.c
|
|
@@ -4464,6 +4464,7 @@ static void spi_nor_info_init_params(str
|
|
struct spi_nor_erase_map *map = ¶ms->erase_map;
|
|
const struct flash_info *info = nor->info;
|
|
struct device_node *np = spi_nor_get_flash_node(nor);
|
|
+ struct mtd_info *mtd = &nor->mtd;
|
|
u8 i, erase_mask;
|
|
|
|
/* Initialize legacy flash parameters and settings. */
|
|
@@ -4527,6 +4528,21 @@ static void spi_nor_info_init_params(str
|
|
*/
|
|
erase_mask = 0;
|
|
i = 0;
|
|
+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
|
|
+ if ((info->flags & SECT_4K_PMC) && (mtd->size <=
|
|
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
|
|
+ erase_mask |= BIT(i);
|
|
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
|
|
+ SPINOR_OP_BE_4K_PMC);
|
|
+ i++;
|
|
+ } else if ((info->flags & SECT_4K) && (mtd->size <=
|
|
+ CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT * 1024)) {
|
|
+ erase_mask |= BIT(i);
|
|
+ spi_nor_set_erase_type(&map->erase_type[i], 4096u,
|
|
+ SPINOR_OP_BE_4K);
|
|
+ i++;
|
|
+ }
|
|
+#else
|
|
if (info->flags & SECT_4K_PMC) {
|
|
erase_mask |= BIT(i);
|
|
spi_nor_set_erase_type(&map->erase_type[i], 4096u,
|
|
@@ -4538,6 +4554,7 @@ static void spi_nor_info_init_params(str
|
|
SPINOR_OP_BE_4K);
|
|
i++;
|
|
}
|
|
+#endif
|
|
erase_mask |= BIT(i);
|
|
spi_nor_set_erase_type(&map->erase_type[i], info->sector_size,
|
|
SPINOR_OP_SE);
|