d337731f85
Automatically refreshed: ath79/patches-5.10/0032-MIPS-ath79-sanitize-symbols.patch bcm63xx/patches-5.10/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch bcm63xx/patches-5.10/434-nand-brcmnand-fix-OOB-R-W-with-Hamming-ECC.patch bmips/patches-5.10/001-v5.11-mips-bmips-select-ARCH_HAS_RESET_CONTROLLER.patch bmips/patches-5.10/041-v5.13-mtd-rawnand-brcmnand-fix-OOB-R-W-with-Hamming-ECC.patch bmips/patches-5.10/202-mips-bmips-disable-ARCH_HAS_SYNC_DMA_FOR_CPU_ALL.patch bmips/patches-5.10/600-mips-bmips-add-pci-support.patch generic/backport-5.10/103-v5.13-MIPS-select-CPU_MIPS64-for-remaining-MIPS64-CPUs.patch generic/hack-5.10/301-mips_image_cmdline_hack.patch generic/hack-5.10/402-mtd-blktrans-call-add-disks-after-mtd-device.patch generic/hack-5.10/902-debloat_proc.patch generic/pending-5.10/300-mips_expose_boot_raw.patch generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch generic/pending-5.10/630-packet_socket_type.patch ipq806x/patches-5.10/0072-add-ipq806x-with-no-clocks.patch ipq806x/patches-5.10/099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch lantiq/patches-5.10/0001-MIPS-lantiq-add-pcie-driver.patch lantiq/patches-5.10/0023-NET-PHY-add-led-support-for-intel-xway.patch lantiq/patches-5.10/0152-lantiq-VPE.patch Deleted (reverse-appliable): bmips/patches-5.10/052-v5.13-gpio-guard-gpiochip_irqchip_add_domain-with-GPIOLIB_.patch generic/backport-5.10/499-v5.13-mtd-don-t-lock-when-recursively-deleting-partitions.patch Deleted (alternative upstream fix): ramips/patches-5.10/330-fix-pci-init-mt7620.patch Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From cf0d2fbaae9e962d91a321de75e0d4f9f9ccbdfe Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
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Date: Thu, 21 Jan 2021 18:17:37 +0100
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Subject: [PATCH] nand: brcmnand: fix OOB R/W with Hamming ECC
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
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always be done without ECC enabled.
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This is a problem when adding JFFS2 cleanmarkers to erased blocks. When JFFS2
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clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
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from ff ff ff to 00 00 00, reporting incorrect ECC errors.
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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---
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drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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@@ -2694,6 +2694,12 @@ static int brcmnand_attach_chip(struct n
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chip->ecc.read_oob = brcmnand_read_oob_raw;
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}
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+ /* If OOB is written with ECC enabled it will cause ECC errors */
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+ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) {
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+ chip->ecc.write_oob = brcmnand_write_oob_raw;
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+ chip->ecc.read_oob = brcmnand_read_oob_raw;
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+ }
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+
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return ret;
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}
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