635f111148
In ath79, for several SoCs the console bootargs are defined to the very same value in every device's DTS. Consolidate these definitions in the SoC dtsi files and drop further redundant definitions elsewhere. The only device without any bootargs set has been OpenMesh OM5P-AC V2. This will now inherit the setting from qca955x.dtsi Note that while this tidies up master a lot, it might develop into a frequent pitfall for backports. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
176 lines
2.7 KiB
Plaintext
176 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
#include "qca955x.dtsi"
|
|
|
|
/ {
|
|
model = "EnGenius EPG5000";
|
|
compatible = "engenius,epg5000", "qca,qca9558";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_power: power {
|
|
label = "epg5000:amber:power";
|
|
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
|
|
wlan2g {
|
|
label = "epg5000:blue:wlan2g";
|
|
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy1tpt";
|
|
};
|
|
|
|
wlan5g {
|
|
label = "epg5000:blue:wlan5g";
|
|
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
wps_amber {
|
|
label = "epg5000:amber:wps";
|
|
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps_blue {
|
|
label = "epg5000:blue:wps";
|
|
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
|
debounce-interval = <60>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
|
|
debounce-interval = <60>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
phy-handle = <&phy0>;
|
|
pll-data = <0xa6000000 0x00000101 0x00001616>;
|
|
};
|
|
|
|
&mdio0 {
|
|
status = "okay";
|
|
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
|
|
qca,ar8327-initvals = <
|
|
0x04 0x87600000 /* PORT0 PAD MODE CTRL */
|
|
0x7c 0x0000007e /* PORT0_STATUS */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&pcie0 {
|
|
status = "okay";
|
|
|
|
wifi@0,0 {
|
|
compatible = "pci168c,003c";
|
|
reg = <0x0000 0 0 0 0>;
|
|
};
|
|
};
|
|
|
|
&spi {
|
|
status = "okay";
|
|
|
|
num-cs = <1>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x000000 0x030000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x030000 0x010000>;
|
|
};
|
|
|
|
partition@40000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x040000 0xe50000>;
|
|
};
|
|
|
|
partition@790000 {
|
|
label = "manufacture";
|
|
reg = <0xe90000 0x100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@ed0000 {
|
|
label = "backup";
|
|
reg = <0xf90000 0x010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@fe0000 {
|
|
label = "storage";
|
|
reg = <0xfa0000 0x050000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@ff0000 {
|
|
label = "art";
|
|
reg = <0xff0000 0x010000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&uart {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
|
|
qca,no-eeprom;
|
|
};
|