Openwrt/target/linux/mvebu/files-5.4/arch/arm/boot/dts/armada-385-linksys-venom.dts
DENG Qingfang 70193703a9 mvebu: copy files and patches to 5.4
Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn>
2020-04-13 22:41:37 +02:00

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/*
* Device Tree file for the Linksys WRT32X (Venom)
*
* Copyright (C) 2017 Imre Kaloz <kaloz@openwrt.org>
*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "armada-385-linksys.dtsi"
/ {
model = "Linksys WRT32X";
compatible = "linksys,venom", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "serial0:115200n8";
append-rootblock = "root=/dev/mtdblock";
};
};
&expander0 {
wan_amber@0 {
label = "venom:amber:wan";
reg = <0x0>;
};
wan_blue@1 {
label = "venom:blue:wan";
reg = <0x1>;
};
usb2@5 {
label = "venom:blue:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "venom:blue:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "venom:blue:usb3_2";
reg = <0x7>;
};
wps_blue@8 {
label = "venom:blue:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "venom:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
label = "venom:blue:power";
};
sata {
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
label = "venom:blue:sata";
};
wlan_2g {
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
label = "venom:blue:wlan_2g";
};
wlan_5g {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
label = "venom:blue:wlan_5g";
};
};
&gpio_leds_pins {
marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
};
&nand {
/* Spansion S34ML02G2 256MiB, OEM Layout */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MB */
read-only;
};
partition@200000 {
label = "u_env";
reg = <0x200000 0x20000>; /* 128KB */
};
partition@220000 {
label = "s_env";
reg = <0x220000 0x40000>; /* 256KB */
};
partition@180000 {
label = "unused_area";
reg = <0x260000 0x5c0000>; /* 5.75MB */
};
partition@7e0000 {
label = "devinfo";
reg = <0x7e0000 0x40000>; /* 256KB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@900000 {
label = "kernel1";
reg = <0x900000 0x7b00000>; /* 123MB */
};
partition@c00000 {
label = "rootfs1";
reg = <0xc00000 0x7800000>; /* 120MB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@8400000 {
label = "kernel2";
reg = <0x8400000 0x7b00000>; /* 123MB */
};
partition@8700000 {
label = "rootfs2";
reg = <0x8700000 0x7800000>; /* 120MB */
};
/* last MB is for the BBT, not writable */
partition@ff00000 {
label = "BBT";
reg = <0xff00000 0x100000>;
};
};
};
&pcie1 {
mwlwifi {
marvell,chainmask = <4 4>;
};
};
&pcie2 {
mwlwifi {
marvell,chainmask = <4 4>;
};
};
&sdhci {
pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>;
no-1-8-v;
non-removable;
wp-inverted;
bus-width = <8>;
status = "okay";
};
&usb3_1_vbus {
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
&usb3_1_vbus_pins {
marvell,pins = "mpp44";
};