288 lines
6.4 KiB
C
288 lines
6.4 KiB
C
/*
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* Atheros AR71xx built-in ethernet mac driver
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*
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Based on Atheros' AG7100 driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include "ag71xx.h"
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static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
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{
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switch (ag->speed) {
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case SPEED_1000:
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return "1000";
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case SPEED_100:
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return "100";
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case SPEED_10:
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return "10";
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}
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return "?";
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}
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#define AR71XX_PLL_VAL_1000 0x00110000
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#define AR71XX_PLL_VAL_100 0x00001099
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#define AR71XX_PLL_VAL_10 0x00991099
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#define AR91XX_PLL_VAL_1000 0x1a000000
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#define AR91XX_PLL_VAL_100 0x13000a44
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#define AR91XX_PLL_VAL_10 0x00441099
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static void ag71xx_phy_link_update(struct ag71xx *ag)
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{
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struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
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u32 cfg2;
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u32 ifctl;
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u32 pll;
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u32 fifo5;
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u32 mii_speed;
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if (!ag->link) {
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netif_carrier_off(ag->dev);
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if (netif_msg_link(ag))
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printk(KERN_INFO "%s: link down\n", ag->dev->name);
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return;
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}
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cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
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cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
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cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
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ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
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ifctl &= ~(MAC_IFCTL_SPEED);
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fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
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fifo5 &= ~FIFO_CFG5_BM;
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switch (ag->speed) {
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case SPEED_1000:
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mii_speed = MII_CTRL_SPEED_1000;
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cfg2 |= MAC_CFG2_IF_1000;
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pll = pdata->is_ar91xx ? AR91XX_PLL_VAL_1000
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: AR71XX_PLL_VAL_1000;
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fifo5 |= FIFO_CFG5_BM;
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break;
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case SPEED_100:
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mii_speed = MII_CTRL_SPEED_100;
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cfg2 |= MAC_CFG2_IF_10_100;
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ifctl |= MAC_IFCTL_SPEED;
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pll = pdata->is_ar91xx ? AR91XX_PLL_VAL_100
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: AR71XX_PLL_VAL_100;
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break;
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case SPEED_10:
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mii_speed = MII_CTRL_SPEED_10;
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cfg2 |= MAC_CFG2_IF_10_100;
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pll = pdata->is_ar91xx ? AR91XX_PLL_VAL_10
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: AR71XX_PLL_VAL_10;
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break;
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default:
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BUG();
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return;
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}
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3,
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pdata->is_ar91xx ? 0x780fff : 0x008001ff);
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pdata->set_pll(pll);
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ag71xx_mii_ctrl_set_speed(ag, mii_speed);
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ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
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ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
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netif_carrier_on(ag->dev);
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if (netif_msg_link(ag))
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printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
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ag->dev->name,
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ag71xx_speed_str(ag),
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(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
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DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
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ag->dev->name,
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
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DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
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ag->dev->name,
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
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ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
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DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
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ag->dev->name,
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ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
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ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
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ag71xx_mii_ctrl_rr(ag));
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}
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static void ag71xx_phy_link_adjust(struct net_device *dev)
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{
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struct ag71xx *ag = netdev_priv(dev);
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struct phy_device *phydev = ag->phy_dev;
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unsigned long flags;
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int status_change = 0;
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spin_lock_irqsave(&ag->lock, flags);
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if (phydev->link) {
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if (ag->duplex != phydev->duplex
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|| ag->speed != phydev->speed) {
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status_change = 1;
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}
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}
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if (phydev->link != ag->link)
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status_change = 1;
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ag->link = phydev->link;
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ag->duplex = phydev->duplex;
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ag->speed = phydev->speed;
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if (status_change)
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ag71xx_phy_link_update(ag);
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spin_unlock_irqrestore(&ag->lock, flags);
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}
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void ag71xx_phy_start(struct ag71xx *ag)
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{
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if (ag->phy_dev) {
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phy_start(ag->phy_dev);
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} else {
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struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
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ag->duplex = pdata->duplex;
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ag->speed = pdata->speed;
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ag->link = 1;
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ag71xx_phy_link_update(ag);
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}
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}
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void ag71xx_phy_stop(struct ag71xx *ag)
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{
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if (ag->phy_dev) {
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phy_stop(ag->phy_dev);
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} else {
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ag->duplex = -1;
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ag->link = 0;
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ag->speed = 0;
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ag71xx_phy_link_update(ag);
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}
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}
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static int ag71xx_phy_connect_fixed(struct ag71xx *ag)
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{
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struct net_device *dev = ag->dev;
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struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
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int ret = 0;
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/* use fixed settings */
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switch (pdata->speed) {
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case SPEED_10:
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case SPEED_100:
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case SPEED_1000:
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break;
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default:
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printk(KERN_ERR "%s: invalid speed specified\n",
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dev->name);
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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static int ag71xx_phy_connect_multi(struct ag71xx *ag)
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{
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struct net_device *dev = ag->dev;
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struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
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struct phy_device *phydev = NULL;
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int phy_count = 0;
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int phy_addr;
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int ret = 0;
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for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
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if (!(pdata->phy_mask & (1 << phy_addr)))
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continue;
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if (ag->mii_bus->phy_map[phy_addr] == NULL)
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continue;
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DBG("%s: PHY found at %s, uid=%08x\n",
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dev->name,
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ag->mii_bus->phy_map[phy_addr]->dev.bus_id,
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ag->mii_bus->phy_map[phy_addr]->phy_id);
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if (phydev == NULL)
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phydev = ag->mii_bus->phy_map[phy_addr];
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phy_count++;
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}
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switch (phy_count) {
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case 0:
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printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n",
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dev->name, pdata->phy_mask);
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ret = -ENODEV;
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break;
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case 1:
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ag->phy_dev = phy_connect(dev, phydev->dev.bus_id,
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&ag71xx_phy_link_adjust, 0, pdata->phy_if_mode);
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if (IS_ERR(ag->phy_dev)) {
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printk(KERN_ERR "%s: could not connect to PHY at %s\n",
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dev->name, phydev->dev.bus_id);
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return PTR_ERR(ag->phy_dev);
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}
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/* mask with MAC supported features */
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if (pdata->has_gbit)
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phydev->supported &= PHY_GBIT_FEATURES;
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else
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phydev->supported &= PHY_BASIC_FEATURES;
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phydev->advertising = phydev->supported;
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printk(KERN_DEBUG "%s: connected to PHY at %s "
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"[uid=%08x, driver=%s]\n",
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dev->name, phydev->dev.bus_id,
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phydev->phy_id, phydev->drv->name);
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ag->link = 0;
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ag->speed = 0;
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ag->duplex = -1;
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break;
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default:
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printk(KERN_DEBUG "%s: connected to %d PHYs\n",
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dev->name, phy_count);
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ret = ag71xx_phy_connect_fixed(ag);
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break;
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}
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return ret;
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}
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int ag71xx_phy_connect(struct ag71xx *ag)
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{
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struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
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if (pdata->phy_mask)
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return ag71xx_phy_connect_multi(ag);
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return ag71xx_phy_connect_fixed(ag);
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}
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void ag71xx_phy_disconnect(struct ag71xx *ag)
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{
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if (ag->phy_dev)
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phy_disconnect(ag->phy_dev);
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}
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