Peter Denison 571e979829 On embedded devices we must not route the interrupts through the PCI core, if our host-bus is not PCI Reported-by: Steve Brown <sbrown@cortland.com> Signed-off-by: Michael Buesch <mb@bu3sch.d> ... SVN-Revision: 11750		2008-07-08 17:50:40 +00:00
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100-board_support.patch
110-flash_map.patch
130-remove_scache.patch
150-cpu_fixes.patch
160-kmap_coherent.patch
220-bcm5354.patch
250-ohci-ssb-usb2.patch
260-ohci-set-dma-mask.patch
300-fork_cacheflush.patch
310-no_highpage.patch
400-arch-bcm47xx.patch
500-lzma_initramfs.patch
601-mips-remove-pci-collision-check.patch
620-ssb-modinit-fix.patch
630-ssb-fix-irq-init.patch	On embedded devices we must not route the interrupts through the PCI core, if our host-bus is not PCI Reported-by: Steve Brown <sbrown@cortland.com> Signed-off-by: Michael Buesch <mb@bu3sch.d>	2008-07-08 17:50:40 +00:00
680-ssb-support-8bit-writes.patch
690-mips-allow-pciregister-after-boot.patch
700-ssb-gigabit-ethernet-driver.patch