6abce4d5e4
Commit 6f6c00cfc9 ("ipq40xx: Add support for Unielec U4019") has
introduced support for `phy-reset-gpio` DT property, which isn't needed
as the MDIO already supports `reset-gpios`[1] which could be used instead.
1. https://elixir.bootlin.com/linux/v4.19.81/source/Documentation/devicetree/bindings/net/mdio.txt
Ref: PR#2511
Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn>
[commit title and description facelift]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
226 lines
6.2 KiB
Diff
226 lines
6.2 KiB
Diff
--- a/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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@@ -519,6 +519,13 @@ config XILINX_GMII2RGMII
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the Reduced Gigabit Media Independent Interface(RGMII) between
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Ethernet physical media devices and the Gigabit Ethernet controller.
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+config MDIO_IPQ40XX
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+ tristate "Qualcomm Atheros ipq40xx MDIO interface"
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+ depends on HAS_IOMEM && OF
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+ ---help---
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+ This driver supports the MDIO interface found in Qualcomm
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+ Atheros ipq40xx Soc chip.
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+
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endif # PHYLIB
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config MICREL_KS8995MA
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--- a/drivers/net/phy/Makefile
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+++ b/drivers/net/phy/Makefile
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@@ -48,6 +48,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium
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obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
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obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
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obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
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+obj-$(CONFIG_MDIO_IPQ40XX) += mdio-ipq40xx.o
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obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o
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obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
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obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
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--- /dev/null
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+++ b/drivers/net/phy/mdio-ipq40xx.c
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@@ -0,0 +1,196 @@
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+/*
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+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
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+ *
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+ * Permission to use, copy, modify, and/or distribute this software for
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+ * any purpose with or without fee is hereby granted, provided that the
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+ * above copyright notice and this permission notice appear in all copies.
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+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
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+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/mutex.h>
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+#include <linux/io.h>
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+#include <linux/of_address.h>
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+#include <linux/of_mdio.h>
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+#include <linux/phy.h>
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+#include <linux/platform_device.h>
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+
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+#define MDIO_CTRL_0_REG 0x40
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+#define MDIO_CTRL_1_REG 0x44
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+#define MDIO_CTRL_2_REG 0x48
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+#define MDIO_CTRL_3_REG 0x4c
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+#define MDIO_CTRL_4_REG 0x50
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+#define MDIO_CTRL_4_ACCESS_BUSY BIT(16)
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+#define MDIO_CTRL_4_ACCESS_START BIT(8)
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+#define MDIO_CTRL_4_ACCESS_CODE_READ 0
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+#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1
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+#define CTRL_0_REG_DEFAULT_VALUE 0x150FF
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+
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+#define IPQ40XX_MDIO_RETRY 1000
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+#define IPQ40XX_MDIO_DELAY 10
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+
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+struct ipq40xx_mdio_data {
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+ struct mii_bus *mii_bus;
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+ void __iomem *membase;
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+ struct device *dev;
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+};
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+
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+static int ipq40xx_mdio_wait_busy(struct ipq40xx_mdio_data *am)
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+{
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+ int i;
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+
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+ for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) {
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+ unsigned int busy;
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+
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+ busy = readl(am->membase + MDIO_CTRL_4_REG) &
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+ MDIO_CTRL_4_ACCESS_BUSY;
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+ if (!busy)
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+ return 0;
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+
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+ /* BUSY might take to be cleard by 15~20 times of loop */
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+ udelay(IPQ40XX_MDIO_DELAY);
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+ }
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+
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+ dev_err(am->dev, "%s: MDIO operation timed out\n", am->mii_bus->name);
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+
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+ return -ETIMEDOUT;
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+}
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+
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+static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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+{
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+ struct ipq40xx_mdio_data *am = bus->priv;
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+ int value = 0;
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+ unsigned int cmd = 0;
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+
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+ lockdep_assert_held(&bus->mdio_lock);
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+
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+ if (ipq40xx_mdio_wait_busy(am))
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+ return -ETIMEDOUT;
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+
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+ /* issue the phy address and reg */
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+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
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+
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+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_READ;
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+
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+ /* issue read command */
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+ writel(cmd, am->membase + MDIO_CTRL_4_REG);
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+
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+ /* Wait read complete */
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+ if (ipq40xx_mdio_wait_busy(am))
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+ return -ETIMEDOUT;
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+
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+ /* Read data */
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+ value = readl(am->membase + MDIO_CTRL_3_REG);
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+
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+ return value;
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+}
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+
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+static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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+ u16 value)
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+{
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+ struct ipq40xx_mdio_data *am = bus->priv;
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+ unsigned int cmd = 0;
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+
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+ lockdep_assert_held(&bus->mdio_lock);
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+
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+ if (ipq40xx_mdio_wait_busy(am))
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+ return -ETIMEDOUT;
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+
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+ /* issue the phy address and reg */
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+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
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+
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+ /* issue write data */
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+ writel(value, am->membase + MDIO_CTRL_2_REG);
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+
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+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_WRITE;
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+ /* issue write command */
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+ writel(cmd, am->membase + MDIO_CTRL_4_REG);
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+
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+ /* Wait write complete */
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+ if (ipq40xx_mdio_wait_busy(am))
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+ return -ETIMEDOUT;
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+
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+ return 0;
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+}
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+
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+static int ipq40xx_mdio_probe(struct platform_device *pdev)
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+{
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+ struct ipq40xx_mdio_data *am;
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+ struct resource *res;
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+ int i;
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+
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+ am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL);
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+ if (!am)
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+ return -ENOMEM;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev, "no iomem resource found\n");
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+ return -ENXIO;
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+ }
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+
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+ am->membase = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(am->membase)) {
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+ dev_err(&pdev->dev, "unable to ioremap registers\n");
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+ return PTR_ERR(am->membase);
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+ }
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+
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+ am->mii_bus = devm_mdiobus_alloc(&pdev->dev);
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+ if (!am->mii_bus)
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+ return -ENOMEM;
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+
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+ writel(CTRL_0_REG_DEFAULT_VALUE, am->membase + MDIO_CTRL_0_REG);
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+
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+ am->mii_bus->name = "ipq40xx_mdio";
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+ am->mii_bus->read = ipq40xx_mdio_read;
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+ am->mii_bus->write = ipq40xx_mdio_write;
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+ am->mii_bus->priv = am;
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+ am->mii_bus->parent = &pdev->dev;
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+ snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
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+
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+ am->dev = &pdev->dev;
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+ platform_set_drvdata(pdev, am);
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+
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+ return of_mdiobus_register(am->mii_bus, pdev->dev.of_node);
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+}
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+
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+static int ipq40xx_mdio_remove(struct platform_device *pdev)
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+{
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+ struct ipq40xx_mdio_data *am = platform_get_drvdata(pdev);
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+
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+ mdiobus_unregister(am->mii_bus);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id ipq40xx_mdio_dt_ids[] = {
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+ { .compatible = "qcom,ipq4019-mdio" },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids);
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+
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+static struct platform_driver ipq40xx_mdio_driver = {
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+ .probe = ipq40xx_mdio_probe,
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+ .remove = ipq40xx_mdio_remove,
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+ .driver = {
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+ .name = "ipq40xx-mdio",
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+ .of_match_table = ipq40xx_mdio_dt_ids,
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+ },
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+};
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+
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+module_platform_driver(ipq40xx_mdio_driver);
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+
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+#define DRV_VERSION "1.0"
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+
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+MODULE_DESCRIPTION("IPQ40XX MDIO interface driver");
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+MODULE_AUTHOR("Qualcomm Atheros");
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+MODULE_VERSION(DRV_VERSION);
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+MODULE_LICENSE("Dual BSD/GPL");
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