Openwrt/target/linux/ipq806x/patches-3.18/707-ARM-dts-qcom-add-mdio-nodes-to-ap148-db149.patch
Felix Fietkau 0f7de49fa3 ipq806x: fix freeze in PCIe code when booting with an old u-boot
Old bootloader (same ones which have DT disabled) don't perform any PCIe
initialization. The consequence is a freeze during PCIe bring-up on
these old u-boot. Same kernel with a newer bootloaders works fine as
they contain the corresponding PCIe init code.

In this change, we'll add the missing init and make sure the kernel
doesn't rely on some preexisting init to get PCIe to work. That includes
the following changes:
*GPIOs: set function & drive strength
*Clocks: add init code for aux & ref clocks
*PCIe driver: additional init of the hardware controller

Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 46557
2015-08-04 23:10:03 +00:00

146 lines
3.1 KiB
Diff

From e81de9d28bd0421c236df322872e64edf4ee1852 Mon Sep 17 00:00:00 2001
From: Mathieu Olivari <mathieu@codeaurora.org>
Date: Mon, 11 May 2015 16:32:09 -0700
Subject: [PATCH 7/8] ARM: dts: qcom: add mdio nodes to ap148 & db149
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 40 ++++++++++++++++++++++++++-
arch/arm/boot/dts/qcom-ipq8064-db149.dts | 46 ++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -19,8 +19,9 @@
};
};
- alias {
+ aliases {
serial0 = &uart4;
+ mdio-gpio0 = &mdio0;
};
chosen {
@@ -61,6 +62,15 @@
bias-none;
};
};
+
+ mdio0_pins: mdio0_pins {
+ mux {
+ pins = "gpio0", "gpio1";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
};
gsbi@16300000 {
@@ -170,5 +180,33 @@
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
};
+
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ phy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE */
+ 0x00008 0x1000000 /* PAD5_MODE */
+ 0x0000c 0x80 /* PAD6_MODE */
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+ };
+
+ phy4: ethernet-phy@4 {
+ device_type = "ethernet-phy";
+ reg = <4>;
+ };
+ };
};
};
--- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
@@ -16,6 +16,7 @@
alias {
serial0 = &uart2;
+ mdio-gpio0 = &mdio0;
};
chosen {
@@ -65,6 +66,15 @@
bias-none;
};
};
+
+ mdio0_pins: mdio0_pins {
+ mux {
+ pins = "gpio0", "gpio1";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
};
gsbi2: gsbi@12480000 {
@@ -176,5 +186,44 @@
pinctrl-0 = <&pcie2_pins>;
pinctrl-names = "default";
};
+
+ mdio0: mdio {
+ compatible = "virtual,mdio-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ phy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE */
+ 0x00008 0x1000000 /* PAD5_MODE */
+ 0x0000c 0x80 /* PAD6_MODE */
+ 0x000e4 0xaa545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+ };
+
+ phy4: ethernet-phy@4 {
+ device_type = "ethernet-phy";
+ reg = <4>;
+ };
+
+ phy6: ethernet-phy@6 {
+ device_type = "ethernet-phy";
+ reg = <6>;
+ };
+
+ phy7: ethernet-phy@7 {
+ device_type = "ethernet-phy";
+ reg = <7>;
+ };
+ };
};
};