c30220d458
Cell C RTL30VW is a LTE router with tho gigabit ethernets and integrated QMI mPCIE modem. This is stripped version of ASKEY RTL0030VW. Hardware: Specification: -CPU: IPQ4019 -RAM: 256MB -Flash: NAND 128MB + NOR 16MB -WiFi: Integrated bgn/ac -LTE: mPCIe card (Modem chipset MDM9230) -LAN: 2 Gigabit Ports -USB: 2x USB2.0 -Serial console: RJ-45 115200 8n1 -Unsupported VoIP Known issues: None so far. Instruction install: There are two methods: Factory web-gui and serial + tftp. Web-gui: 1. Apply factory image via stock web-gui. Serial + initramfs: 1. Rename OpenWrt initramfs image to "image" 2. Connect serial console (115200,8n1) 3. Set IP to different than 192.168.1.11, but 24 bit mask, eg. 192.168.1.4. 4. U-Boot commands: sf probe && sf read 0x80000000 0x180000 0x10000 setenv serverip 192.168.1.4 set fdt_high 0x85000000 tftpboot 0x84000000 image bootm 0x84000000 5. Install sysupgrade image via "sysupgrade -n" Back to stock: All is needed is swap 0x4c byte in mtd8 from 0 to 1 or 1 to 0, do firstboot and factory reset with OFW: 1. read mtd8: dd if=/dev/mtd8 of=/tmp/mtd8 2. go to tmp: cd /tmp/ 3. write first part of partition: dd if=mtd8 of=mtd8.new bs=1 count=76 4. check which layout uses bootloader: cat /proc/mtd 5a. If first are kernel_1 and rootfs_1 write 0: echo -n -e '\x00' >> mtd8.new 5b. If first are kernel and rootfs write 1: echo -n -e '\x01' >> mtd8.new 6. fill with rest of data: dd if=mtd8 bs=1 skip=77 >> mtd8.new 7. CHECK IF mtd8.new HAVE CHANGED ONLY ONE BYTE! e.g with: hexdump mtd8.new 8. write new mtd8 to flash: mtd write mtd8.new /dev/mtd8 9. do firstboot 10.reboot 11. Do back to factory defaults in OFW GUI. Based on work: Cezary Jackiewicz <cezary@eko.one.pl> Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
386 lines
6.8 KiB
Plaintext
386 lines
6.8 KiB
Plaintext
// SPDX-License-Identifier: ISC
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// Copyright (c) 2015, The Linux Foundation. All rights reserved.
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// Copyright (c) 2019, Cezary Jackiewicz <cezary@eko.one.pl>.
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// Copyright (c) 2020, Pawel Dembicki <paweldembicki@gmail.com>.
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#include "qcom-ipq4019.dtsi"
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#include <dt-bindings/soc/qcom,tcsr.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Cell C RTL30VW";
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compatible = "cellc,rtl30vw";
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aliases {
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led-boot = &led_power_blue;
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led-failsafe = &led_power_red;
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led-running = &led_power_blue;
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led-upgrade = &led_power_red;
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};
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chosen {
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bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro";
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};
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led_spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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num-chipselects = <1>;
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mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
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cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
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sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
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led_gpio: led_gpio@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <2>;
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spi-max-frequency = <1000000>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power_blue: power_blue {
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gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:power";
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default-state = "on";
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};
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led_power_red: power_red {
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gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:red:power";
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};
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tp28 {
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gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
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label = "rtl30vw:ext:tp28";
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default-state = "keep";
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};
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tp27 {
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gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
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label = "rtl30vw:ext:tp27";
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default-state = "keep";
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};
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wlan2g {
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gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:wlan2g";
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linux,default-trigger = "phy0tpt";
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};
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wlan5g {
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gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:wlan5g";
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linux,default-trigger = "phy1tpt";
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};
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wps {
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gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:wps";
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};
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voip {
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gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:voip";
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};
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s1 {
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gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:s1";
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};
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s2 {
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gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:s2";
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};
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s3 {
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gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:s3";
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};
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s4 {
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gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:blue:s4";
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};
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signal {
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gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
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label = "rtl30vw:red:signal";
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
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};
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
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};
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};
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soc {
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rng@22000 {
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status = "okay";
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};
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mdio@90000 {
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status = "okay";
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};
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ess-psgmii@98000 {
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status = "okay";
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};
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tcsr@1949000 {
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compatible = "qcom,tcsr";
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reg = <0x1949000 0x100>;
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qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
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};
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tcsr@194b000 {
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/* select hostmode */
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compatible = "qcom,tcsr";
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reg = <0x194b000 0x100>;
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qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
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status = "okay";
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};
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ess_tcsr@1953000 {
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compatible = "qcom,tcsr";
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reg = <0x1953000 0x1000>;
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qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
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};
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tcsr@1957000 {
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compatible = "qcom,tcsr";
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reg = <0x1957000 0x100>;
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qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
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};
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usb2@60f8800 {
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status = "okay";
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};
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usb3@8af8800 {
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status = "okay";
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};
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crypto@8e3a000 {
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status = "okay";
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};
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watchdog@b017000 {
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status = "okay";
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};
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ess-switch@c000000 {
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status = "okay";
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};
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edma@c080000 {
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status = "okay";
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};
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};
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};
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&blsp_dma {
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status = "okay";
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
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flash@0 {
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/*"n25q128a11" is required for proper nand recognition in u-boot. */
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compatible = "jedec,spi-nor", "n25q128a11";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "0:MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "0:QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "0:CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "0:DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "0:APPSBLENV";
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reg = <0xe0000 0x10000>;
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read-only;
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};
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partition@f0000 {
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label = "0:APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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partition@170000 {
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label = "0:ART";
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reg = <0x170000 0x10000>;
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read-only;
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};
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partition@180000 {
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label = "0:BOOTCONFIG";
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reg = <0x180000 0x10000>;
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read-only;
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};
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};
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};
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flash@1 {
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/*
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* Factory U-boot looks in 0:BOOTCONFIG partition for active
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* partitions settings and mangle partition config. So kernel
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* /kernel_1 and rootfs/rootfs_1 pairs can be swaped.
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* It isn't a problem but we never can be sure where OFW put
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* factory images. "spinand,mt29f" value is required for proper
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* nand recognition in u-boot.
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*/
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compatible = "spi-nand","spinand,mt29f";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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spi-max-frequency = <24000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x400000>;
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};
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partition@400000 {
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label = "rootfs";
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reg = <0x400000 0x2000000>;
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};
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partition@2400000 {
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label = "kernel_1";
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reg = <0x2400000 0x400000>;
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};
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partition@2800000 {
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label = "rootfs_1";
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reg = <0x2800000 0x2000000>;
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};
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partition@4800000 {
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label = "ubifs";
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reg = <0x4800000 0x3800000>;
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};
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};
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};
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};
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&blsp1_uart1 {
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pinctrl-0 = <&serial_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&tlmm {
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serial_pins: serial_pinmux {
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mux {
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pins = "gpio60", "gpio61";
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function = "blsp_uart0";
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bias-disable;
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};
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};
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spi_0_pins: spi_0_pinmux {
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pinmux {
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function = "blsp_spi0";
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pins = "gpio55", "gpio56", "gpio57";
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drive-strength = <12>;
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bias-disable;
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};
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pinmux_cs {
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function = "gpio";
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pins = "gpio54", "gpio59";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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};
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&usb2_hs_phy {
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status = "okay";
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};
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&usb3_ss_phy {
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status = "okay";
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};
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&usb3_hs_phy {
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status = "okay";
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};
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&wifi0 {
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status = "okay";
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qcom,ath10k-calibration-variant = "cellc,rtl30vw";
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};
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&wifi1 {
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status = "okay";
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qcom,ath10k-calibration-variant = "cellc,rtl30vw";
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};
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