Openwrt/target/linux/ath79/dts/qca9563_elecom_wrc-ghbk2-i.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds: leds {
compatible = "gpio-leds";
wps {
label = "red:wps";
gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
ap {
label = "ap";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
partition@50000 {
label = "nvram";
reg = <0x050000 0x020000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x00000080 /* PORT0 PAD MODE CTRL */
0x50 0xcf37cf37 /* LED_CTRL0 */
0x54 0x00000000 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
mtd-mac-address = <&art 0x1002>;
mtd-mac-address-increment = <(-1)>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};