Openwrt/target/linux/ath79/dts/ar9344_ubnt_unifi-ap-pro.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Ubiquiti UniFi AP Pro";
compatible = "ubnt,unifi-ap-pro";
aliases {
led-boot = &led_white;
led-failsafe = &led_white;
led-running = &led_blue;
led-upgrade = &led_blue;
label-mac-device = &eth0;
};
leds {
compatible = "gpio-leds";
led_white: led-white {
label = "white:dome";
gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
};
led_blue: led-blue {
label = "blue:dome";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xf60000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x300000>;
/* Can be resized w/o issues.
* U-Boot can load kernel from the
* entirety of the "firmware" partition space.
*/
};
partition@300000 {
label = "rootfs";
reg = <0x300000 0xc60000>;
};
};
partition@fb0000 {
label = "cfg";
reg = <0xfb0000 0x40000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0 0 0 0 0>;
qca,no-eeprom;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x4 0x7600000 /* PORT0 PAD MODE CTRL */
0x10 0x80000080 /* POWER_ON_STRAP */
0x7c 0x7e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x6000000 0x101 0x1616>;
mtd-mac-address = <&art 0x0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
};