Openwrt/target/linux/ath79/dts/ar9344_ocedo_raccoon.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "OCEDO Raccoon";
compatible = "ocedo,raccoon", "qca,ar9344";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
leds {
compatible = "gpio-leds";
power {
label = "green:power";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "yellow:wlan24";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_system: system {
label = "blue:sys";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g {
label = "red:wlan5";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x740000>;
};
partition@790000 {
label = "vendor";
reg = <0x790000 0x740000>;
read-only;
};
partition@ed0000 {
label = "data";
reg = <0xed0000 0x110000>;
read-only;
};
partition@fe0000 {
label = "id";
reg = <0xfe0000 0x010000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&art 0xc>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x6>;
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&eth0 {
status = "okay";
pll-data = <0x06000000 0x00000101 0x00001313>;
mtd-mac-address = <&art 0x0>;
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};