161 lines
3.7 KiB
Diff
161 lines
3.7 KiB
Diff
From b3cda181b5f9986b05bd95ee322504a8f2ed0b69 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Fri, 12 Apr 2013 06:27:37 +0000
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Subject: [PATCH 34/79] DT: MIPS: ralink: add RT2880 dts files
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Add a dtsi file for RT2880 SoC and a sample dts file.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Patchwork: http://patchwork.linux-mips.org/patch/5188/
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---
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arch/mips/ralink/Kconfig | 4 +++
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arch/mips/ralink/dts/Makefile | 1 +
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arch/mips/ralink/dts/rt2880.dtsi | 58 ++++++++++++++++++++++++++++++++++
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arch/mips/ralink/dts/rt2880_eval.dts | 46 +++++++++++++++++++++++++++
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4 files changed, 109 insertions(+)
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create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
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create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
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diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
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index 86f6c77..2f6fbb8 100644
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--- a/arch/mips/ralink/Kconfig
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+++ b/arch/mips/ralink/Kconfig
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@@ -34,6 +34,10 @@ choice
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config DTB_RT_NONE
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bool "None"
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+ config DTB_RT2880_EVAL
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+ bool "RT2880 eval kit"
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+ depends on SOC_RT288X
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+
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config DTB_RT305X_EVAL
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bool "RT305x eval kit"
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depends on SOC_RT305X
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diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
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index 1a69fb3..f635a01 100644
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--- a/arch/mips/ralink/dts/Makefile
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+++ b/arch/mips/ralink/dts/Makefile
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@@ -1 +1,2 @@
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+obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
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obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
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diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
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new file mode 100644
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index 0000000..182afde
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--- /dev/null
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+++ b/arch/mips/ralink/dts/rt2880.dtsi
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@@ -0,0 +1,58 @@
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "ralink,rt2880-soc";
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+
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+ cpus {
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+ cpu@0 {
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+ compatible = "mips,mips4KEc";
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+ };
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+ };
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+
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+ cpuintc: cpuintc@0 {
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ interrupt-controller;
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+ compatible = "mti,cpu-interrupt-controller";
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+ };
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+
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+ palmbus@300000 {
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+ compatible = "palmbus";
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+ reg = <0x300000 0x200000>;
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+ ranges = <0x0 0x300000 0x1FFFFF>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ sysc@0 {
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+ compatible = "ralink,rt2880-sysc";
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+ reg = <0x0 0x100>;
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+ };
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+
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+ intc: intc@200 {
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+ compatible = "ralink,rt2880-intc";
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+ reg = <0x200 0x100>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&cpuintc>;
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+ interrupts = <2>;
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+ };
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+
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+ memc@300 {
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+ compatible = "ralink,rt2880-memc";
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+ reg = <0x300 0x100>;
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+ };
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+
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+ uartlite@c00 {
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+ compatible = "ralink,rt2880-uart", "ns16550a";
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+ reg = <0xc00 0x100>;
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+
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+ interrupt-parent = <&intc>;
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+ interrupts = <8>;
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+
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+ reg-shift = <2>;
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+ };
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+ };
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+};
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diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
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new file mode 100644
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index 0000000..322d700
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--- /dev/null
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+++ b/arch/mips/ralink/dts/rt2880_eval.dts
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@@ -0,0 +1,46 @@
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+/dts-v1/;
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+
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+/include/ "rt2880.dtsi"
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+
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+/ {
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+ compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
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+ model = "Ralink RT2880 evaluation board";
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+
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+ memory@0 {
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+ reg = <0x8000000 0x2000000>;
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttyS0,57600";
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+ };
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+
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+ cfi@1f000000 {
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+ compatible = "cfi-flash";
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+ reg = <0x1f000000 0x400000>;
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+
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+ bank-width = <2>;
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+ device-width = <2>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "uboot";
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+ reg = <0x0 0x30000>;
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+ read-only;
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+ };
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+ partition@30000 {
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+ label = "uboot-env";
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+ reg = <0x30000 0x10000>;
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+ read-only;
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+ };
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+ partition@40000 {
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+ label = "calibration";
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+ reg = <0x40000 0x10000>;
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+ read-only;
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+ };
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+ partition@50000 {
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+ label = "linux";
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+ reg = <0x50000 0x3b0000>;
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+ };
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+ };
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+};
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--
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1.7.10.4
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