Gabor Juhos 0677e16248 ar71xx: Fix header offset for newer WRT160NL models ... Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K, resulting in miscalculated partition sizes. Since the actual sizes did not change, hardcode them to their current sizes, and make sure they are at least one erase block big (in case Cisco decides to start to use chips with 128K erase blocks). Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com> SVN-Revision: 27049		2011-05-31 22:53:20 +00:00
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gpio
leds
mtd	ar71xx: Fix header offset for newer WRT160NL models	2011-05-31 22:53:20 +00:00
net	ar71xx: ag71xx: make ring sizes configurable via ethtool	2011-05-31 22:53:10 +00:00
spi
usb/host
watchdog	ar71xx: rename ar934x_ref_freq to ar71xx_ref_freq	2011-04-09 18:47:52 +00:00