ath79: add support for TP-Link WDR3500 v1

Hardware:
SoC:      AR9344
CPU:      560 MHz
Flash:    8 MiB
RAM:      128 MiB
WiFi:     Atheros AR9340 2.4GHz 802.11bgn
          Atheros AR9300 5GHz 802.11an
Ethernet: AR934X built-in switch, WAN on separate physical interface
USB:      1x 2.0

Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.

Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to
   wdr3500v1_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
[removed stray newline]
Signed-off-by: David Bauer <mail@david-bauer.net>
This commit is contained in:
Adrian Schmutzler 2019-07-28 12:20:26 +02:00 committed by David Bauer
parent ac31ec0f62
commit fbbb4eb8b4
6 changed files with 237 additions and 130 deletions

View File

@ -83,6 +83,7 @@ ath79_setup_interfaces()
tplink,archer-c25-v1|\
tplink,tl-mr3220-v1|\
tplink,tl-mr3420-v1|\
tplink,tl-wdr3500-v1|\
tplink,tl-wr841-v7|\
tplink,tl-wr841-v9|\
tplink,tl-wr841-v10|\

View File

@ -159,6 +159,7 @@ case "$FIRMWARE" in
ath9k_patch_fw_mac_crc $(macaddr_add $(mtd_get_mac_text "mac" 0x18) 1) 0x2
;;
ocedo,raccoon|\
tplink,tl-wdr3500-v1|\
tplink,tl-wdr3600-v1|\
tplink,tl-wdr4300-v1|\
tplink,tl-wdr4900-v2|\

View File

@ -0,0 +1,85 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ar9344_tplink_tl-wdrxxxx.dtsi"
/ {
model = "TP-Link TL-WDR3500 v1";
compatible = "tplink,tl-wdr3500-v1", "qca,ar9344";
};
&leds {
usb {
label = "tp-link:green:usb";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port>;
};
};
&gpio {
usb_power {
gpio-hog;
gpios = <12 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "tp-link:power:usb";
};
};
&pinmux {
pmx_led_wan_lan: pinmux_led_wan_lan {
pinctrl-single,bits = <0x10 0x2c2d0000 0xffff0000>,
<0x14 0x292a2b 0xffffff>;
};
};
&builtin_switch {
pinctrl-names = "default";
pinctrl-0 = <&pmx_led_wan_lan>;
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&ath9k {
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <1>;
};
&wmac {
mtd-mac-address = <&uboot 0x1fc00>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-1)>;
gmac-config {
device = <&gmac>;
switch-phy-swap = <0>;
switch-only-mode = <1>;
};
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <2>;
};

View File

@ -1,92 +1,24 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344_tplink_tl-wdrxxxx.dtsi"
#include "ar9344.dtsi"
/ {
aliases {
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
&leds {
usb1 {
label = "tp-link:green:usb1";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
leds {
compatible = "gpio-leds";
usb1 {
label = "tp-link:green:usb1";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
usb2 {
label = "tp-link:green:usb2";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port2>;
linux,default-trigger = "usbport";
};
wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
system: system {
label = "tp-link:green:system";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
qss {
label = "tp-link:green:qss";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
usb2 {
label = "tp-link:green:usb2";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port2>;
linux,default-trigger = "usbport";
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wifi {
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
lna0 {
gpio-hog;
gpios = <18 GPIO_ACTIVE_HIGH>;
@ -116,42 +48,6 @@
};
};
&spi {
num-cs = <1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x7d0000>;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
@ -179,23 +75,11 @@
status = "okay";
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&uboot 0x1fc00>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
&ath9k {
mtd-mac-address = <&uboot 0x1fc00>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-1)>;
};

View File

@ -0,0 +1,125 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
aliases {
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
};
leds: leds {
compatible = "gpio-leds";
wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
system: system {
label = "tp-link:green:system";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
qss {
label = "tp-link:green:qss";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wifi {
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&uart {
status = "okay";
};
&spi {
num-cs = <1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x7d0000>;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

View File

@ -328,6 +328,17 @@ define Device/tplink_re450-v2
endef
TARGET_DEVICES += tplink_re450-v2
define Device/tplink_tl-wdr3500-v1
$(Device/tplink-8mlzma)
ATH_SOC := ar9344
DEVICE_MODEL := TL-WDR3500
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x35000001
SUPPORTED_DEVICES += tl-wdr3500
endef
TARGET_DEVICES += tplink_tl-wdr3500-v1
define Device/tplink_tl-wdr3600-v1
$(Device/tplink-8mlzma)
ATH_SOC := ar9344