ath79: add support for TP-Link Archer D50 V1

TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.

Internally eth0 is connected to the Broadcom CPU.

Router section - Specification:

CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB

Known issues:
DSL not working (eth0) (WIP)

UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC

J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX

The following instructions require a connection to the J2 UART header.

Flash instruction under U-Boot, using UART
------------------------------------------
 1. Press any key to stop autobooting and obtain U-Boot CLI access.
 2. Setup ip addresses for U-Boot and your tftp server.
 3. Issue below commands:
	tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
	erase 0x9f020000 +$filesize
	cp.b 0x81000000 0x9f020000 $filesize
	reset

Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
 1. Press any key to stop autobooting and obtain U-Boot CLI access.
 2. Setup ip addresses for U-Boot and your tftp server.
 3. Issue below commands:
	tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
	bootm 0x81000000

Restore the original firmware
-----------------------------
 0. Backup every partition using the OpenWrt web interface
 1. Download the OEM firmware from the TP-Link website
 2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
 3. Remove the U-Boot and the Broadcom image part from the file.
    Issue the following command:
	dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
 4. Double check the .mod file size. It must be 7995392 bytes.
 5. Flash it using the OpenWrt web interface. Force the update if needed.
    WARNING: Remember to NOT keep settings.

 5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
     Issue below commands in the U-Boot:
        tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
        erase 0x9f020000 +$filesize
        cp.b 0x81000000 0x9f020000 $filesize
        reset

Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
This commit is contained in:
Davide Fioravanti 2019-05-05 22:35:00 +02:00 committed by Christian Lamparter
parent c349cc5752
commit f5d2c91415
5 changed files with 219 additions and 0 deletions

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@ -136,6 +136,11 @@ tplink,cpe210-v3)
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "tp-link:green:link3" "wlan0" "60" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "80" "100"
;;
tplink,archer-d50-v1)
ucidef_set_led_switch "lan" "LAN" "tp-link:white:lan" "switch0" "0x1E"
ucidef_set_led_netdev "wan_data" "WAN Data" "tp-link:white:internet" "eth1.2" "tx rx"
ucidef_set_led_netdev "wan_link" "WAN Link" "tp-link:white:wan" "eth1.2" "link"
;;
tplink,re450-v2)
ucidef_set_led_netdev "lan_data" "LAN Data" "tp-link:green:lan_data" "eth0" "tx rx"
ucidef_set_led_netdev "lan_link" "LAN Link" "tp-link:green:lan_link" "eth0" "link"

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@ -178,6 +178,10 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth1" "2:lan" "3:lan" "4:lan" "5:lan" "6@eth0" "1:wan"
;;
tplink,archer-d50-v1)
ucidef_add_switch "switch0" \
"0@eth1" "2:lan:3" "3:lan:2" "4:lan:1" "1:wan"
;;
buffalo,whr-g301n|\
tplink,tl-mr3220-v1|\
tplink,tl-mr3420-v1|\

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@ -147,6 +147,10 @@ case "$FIRMWARE" in
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
;;
tplink,archer-d50-v1)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth1/address) +2)
;;
tplink,re350k-v1)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +2)

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@ -0,0 +1,185 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
compatible = "tplink,archer-d50-v1", "qca,qca9531";
model = "TP-Link Archer D50 v1";
chosen {
bootargs = "console=ttyS0,115200n8";
};
gpio_leds: leds {
compatible = "gpio-leds";
led_wlan2g: wlan2g {
label = "tp-link:white:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan5g: wlan5g {
label = "tp-link:white:wlan5g";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
qss_led: qss {
label = "tp-link:white:qss";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
wan {
label = "tp-link:white:wan";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
lan {
label = "tp-link:white:lan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
usb {
label = "tp-link:white:usb";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};
internet {
label = "tp-link:white:internet";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
system: system{
label = "tp-link:white:system";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
rfkill {
label = "RFKILL button";
linux,code = <KEY_RFKILL>;
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
};
&uart {
status = "okay";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x7a0000>;
};
partition@7c0000 {
label = "config";
reg = <0x7c0000 0x010000>;
read-only;
};
romfile: partition@7d0000 {
label = "romfile";
reg = <0x7d0000 0x010000>;
read-only;
};
partition@7e0000 {
label = "rom";
reg = <0x7e0000 0x010000>;
read-only;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&eth1 {
mtd-mac-address = <&romfile 0xf100>;
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&romfile 0xf100>;
mtd-mac-address-increment = <1>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&romfile 0xf100>;
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,003c";
reg = <0x0000 0 0 0 0>;
};
};
&usb_phy {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};

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@ -133,6 +133,27 @@ define Device/tplink_cpe210-v3
endef
TARGET_DEVICES += tplink_cpe210-v3
define Device/tplink_archer-d50-v1
ATH_SOC := qca9531
DEVICE_TITLE := TP-Link Archer D50 v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
BOARDNAME := ARCHER-D50-V1
IMAGE_SIZE := 7808k
TPLINK_HWID := 0xC1200001
TPLINK_HWREV := 0x00000046
TPLINK_FLASHLAYOUT := 8Mqca
TPLINK_HWREVADD := 0x00000000
TPLINK_HVERSION := 3
KERNEL := kernel-bin | append-dtb | lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | \
tplink-v2-header -s -V "ver. 1.0"
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := tplink-v2-image -s -V "ver. 2.0" | \
append-metadata | check-size $$$$(IMAGE_SIZE)
SUPPORTED_DEVICES += archer-d50-v1
endef
TARGET_DEVICES += tplink_archer-d50-v1
define Device/tplink_re350k-v1
$(Device/tplink-safeloader)
ATH_SOC := qca9558