ath79: add support for TP-Link Archer D50 V1
TP-Link Archer D50 v1 is a dual-band AC1200 router + modem. The router section is based on Qualcomm/Atheros QCA9531 + QCA9882. The "DSL" section is based on BCM6318 but it's currently not supported. Internally eth0 is connected to the Broadcom CPU. Router section - Specification: CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB) RAM: 64 MB (DDR2) Flash: 8 MB (SPI NOR) Wifi 2.4GHz: QCA9531 2T2R Wifi 5GHz: QCA9982 2T2R 4x 10/100 Mbps Ethernet 8x LED, 3x button UART header on PCB Known issues: DSL not working (eth0) (WIP) UART connection --------------- J2 HEADER (Qualcomm CPU) . TX . RX . GND O VCC J16 HEADER (Broadcom CPU) O VCC . GND . RX . TX The following instructions require a connection to the J2 UART header. Flash instruction under U-Boot, using UART ------------------------------------------ 1. Press any key to stop autobooting and obtain U-Boot CLI access. 2. Setup ip addresses for U-Boot and your tftp server. 3. Issue below commands: tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin erase 0x9f020000 +$filesize cp.b 0x81000000 0x9f020000 $filesize reset Initramfs instruction under U-Boot for testing, using UART ---------------------------------------------------------- 1. Press any key to stop autobooting and obtain U-Boot CLI access. 2. Setup ip addresses for U-Boot and your tftp server. 3. Issue below commands: tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin bootm 0x81000000 Restore the original firmware ----------------------------- 0. Backup every partition using the OpenWrt web interface 1. Download the OEM firmware from the TP-Link website 2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin) 3. Remove the U-Boot and the Broadcom image part from the file. Issue the following command: dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616 4. Double check the .mod file size. It must be 7995392 bytes. 5. Flash it using the OpenWrt web interface. Force the update if needed. WARNING: Remember to NOT keep settings. 5b. (Alternative to 5.) Flash it using the U-Boot and UART connection. Issue below commands in the U-Boot: tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod erase 0x9f020000 +$filesize cp.b 0x81000000 0x9f020000 $filesize reset Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed default-state = "off", it's already the default, added pcie node, fixed typo]
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@ -136,6 +136,11 @@ tplink,cpe210-v3)
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ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "tp-link:green:link3" "wlan0" "60" "100"
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ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "80" "100"
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;;
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tplink,archer-d50-v1)
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ucidef_set_led_switch "lan" "LAN" "tp-link:white:lan" "switch0" "0x1E"
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ucidef_set_led_netdev "wan_data" "WAN Data" "tp-link:white:internet" "eth1.2" "tx rx"
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ucidef_set_led_netdev "wan_link" "WAN Link" "tp-link:white:wan" "eth1.2" "link"
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;;
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tplink,re450-v2)
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ucidef_set_led_netdev "lan_data" "LAN Data" "tp-link:green:lan_data" "eth0" "tx rx"
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ucidef_set_led_netdev "lan_link" "LAN Link" "tp-link:green:lan_link" "eth0" "link"
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@ -178,6 +178,10 @@ ath79_setup_interfaces()
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ucidef_add_switch "switch0" \
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"0@eth1" "2:lan" "3:lan" "4:lan" "5:lan" "6@eth0" "1:wan"
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;;
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tplink,archer-d50-v1)
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ucidef_add_switch "switch0" \
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"0@eth1" "2:lan:3" "3:lan:2" "4:lan:1" "1:wan"
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;;
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buffalo,whr-g301n|\
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tplink,tl-mr3220-v1|\
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tplink,tl-mr3420-v1|\
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@ -147,6 +147,10 @@ case "$FIRMWARE" in
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ath10kcal_extract "art" 20480 2116
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ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
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;;
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tplink,archer-d50-v1)
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ath10kcal_extract "art" 20480 2116
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ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth1/address) +2)
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;;
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tplink,re350k-v1)
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ath10kcal_extract "art" 20480 2116
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ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +2)
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185
target/linux/ath79/dts/qca9531_tplink_archer-d50-v1.dts
Normal file
185
target/linux/ath79/dts/qca9531_tplink_archer-d50-v1.dts
Normal file
@ -0,0 +1,185 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca953x.dtsi"
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/ {
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compatible = "tplink,archer-d50-v1", "qca,qca9531";
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model = "TP-Link Archer D50 v1";
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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gpio_leds: leds {
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compatible = "gpio-leds";
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led_wlan2g: wlan2g {
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label = "tp-link:white:wlan2g";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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led_wlan5g: wlan5g {
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label = "tp-link:white:wlan5g";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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qss_led: qss {
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label = "tp-link:white:qss";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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wan {
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label = "tp-link:white:wan";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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lan {
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label = "tp-link:white:lan";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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usb {
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label = "tp-link:white:usb";
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port0>;
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linux,default-trigger = "usbport";
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};
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internet {
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label = "tp-link:white:internet";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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system: system{
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label = "tp-link:white:system";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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};
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rfkill {
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label = "RFKILL button";
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linux,code = <KEY_RFKILL>;
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "WPS button";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart {
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status = "okay";
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x000000 0x020000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x020000 0x7a0000>;
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};
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partition@7c0000 {
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label = "config";
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reg = <0x7c0000 0x010000>;
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read-only;
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};
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romfile: partition@7d0000 {
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label = "romfile";
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reg = <0x7d0000 0x010000>;
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read-only;
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};
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partition@7e0000 {
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label = "rom";
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reg = <0x7e0000 0x010000>;
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read-only;
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};
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art: partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x010000>;
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read-only;
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};
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};
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};
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};
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ð1 {
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mtd-mac-address = <&romfile 0xf100>;
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};
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ð0 {
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status = "okay";
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phy-handle = <&swphy4>;
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mtd-mac-address = <&romfile 0xf100>;
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mtd-mac-address-increment = <1>;
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};
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&wmac {
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status = "okay";
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mtd-cal-data = <&art 0x1000>;
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mtd-mac-address = <&romfile 0xf100>;
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};
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&pcie0 {
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status = "okay";
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wifi@0,0 {
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compatible = "pci168c,003c";
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reg = <0x0000 0 0 0 0>;
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};
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};
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&usb_phy {
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status = "okay";
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};
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&usb0 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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hub_port0: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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@ -133,6 +133,27 @@ define Device/tplink_cpe210-v3
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endef
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TARGET_DEVICES += tplink_cpe210-v3
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define Device/tplink_archer-d50-v1
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ATH_SOC := qca9531
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DEVICE_TITLE := TP-Link Archer D50 v1
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DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
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BOARDNAME := ARCHER-D50-V1
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IMAGE_SIZE := 7808k
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TPLINK_HWID := 0xC1200001
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TPLINK_HWREV := 0x00000046
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TPLINK_FLASHLAYOUT := 8Mqca
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TPLINK_HWREVADD := 0x00000000
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TPLINK_HVERSION := 3
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KERNEL := kernel-bin | append-dtb | lzma
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KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | \
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tplink-v2-header -s -V "ver. 1.0"
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IMAGES := sysupgrade.bin
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IMAGE/sysupgrade.bin := tplink-v2-image -s -V "ver. 2.0" | \
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append-metadata | check-size $$$$(IMAGE_SIZE)
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SUPPORTED_DEVICES += archer-d50-v1
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endef
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TARGET_DEVICES += tplink_archer-d50-v1
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define Device/tplink_re350k-v1
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$(Device/tplink-safeloader)
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ATH_SOC := qca9558
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