mediatek: mt7622-bananapi-bpi-r64-rootdisk rebase to upstream dts
simplify maintaining mt7622-bananapi-bpi-r64-rootdisk.dts by storing only differences between upstream dts Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
This commit is contained in:
Oskari Lemmela
Daniel Golle
parent
7befce2bb1
commit
f0818706eb
@ -5,586 +5,14 @@
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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#include "mt7622-bananapi-bpi-r64.dts"
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/ {
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model = "Bananapi BPI-R64";
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compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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green {
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label = "bpi-r64:pio:green";
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gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
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};
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red {
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label = "bpi-r64:pio:red";
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gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&bch {
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status = "disabled";
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};
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&btif {
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status = "okay";
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};
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&cir {
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pinctrl-names = "default";
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pinctrl-0 = <&irrx_pins>;
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@1f {
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compatible = "mediatek,mt7531";
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reg = <0x1f>;
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reset-gpios = <&pio 54 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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wan: port@0 {
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reg = <0>;
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label = "wan";
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};
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port@1 {
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reg = <1>;
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label = "lan0";
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&emmc_pins_default>;
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pinctrl-1 = <&emmc_pins_uhs>;
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status = "okay";
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
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non-removable;
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};
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&mmc1 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&sd0_pins_default>;
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pinctrl-1 = <&sd0_pins_uhs>;
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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r_smpl = <1>;
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cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
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};
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&nandc {
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pinctrl-names = "default";
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pinctrl-0 = <¶llel_nand_pins>;
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status = "disabled";
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};
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&nor_flash {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_nor_pins>;
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status = "disabled";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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};
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&pcie1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_pins>;
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status = "okay";
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};
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&pio {
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/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
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* SATA functions. i.e. output-high: PCIe, output-low: SATA
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*/
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asm_sel {
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gpio-hog;
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gpios = <90 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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/* eMMC is shared pin with parallel NAND */
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emmc_pins_default: emmc-pins-default {
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mux {
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function = "emmc", "emmc_rst";
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groups = "emmc";
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};
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/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
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* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
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* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
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*/
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conf-cmd-dat {
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pins = "NDL0", "NDL1", "NDL2",
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"NDL3", "NDL4", "NDL5",
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"NDL6", "NDL7", "NRB";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "NCLE";
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bias-pull-down;
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};
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};
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emmc_pins_uhs: emmc-pins-uhs {
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mux {
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function = "emmc";
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groups = "emmc";
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};
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conf-cmd-dat {
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pins = "NDL0", "NDL1", "NDL2",
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"NDL3", "NDL4", "NDL5",
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"NDL6", "NDL7", "NRB";
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input-enable;
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drive-strength = <4>;
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bias-pull-up;
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};
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conf-clk {
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pins = "NCLE";
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drive-strength = <4>;
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bias-pull-down;
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};
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};
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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i2c1_pins: i2c1-pins {
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mux {
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function = "i2c";
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groups = "i2c1_0";
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};
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};
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i2c2_pins: i2c2-pins {
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mux {
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function = "i2c";
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groups = "i2c2_0";
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};
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};
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i2s1_pins: i2s1-pins {
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mux {
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function = "i2s";
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groups = "i2s_out_mclk_bclk_ws",
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"i2s1_in_data",
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"i2s1_out_data";
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};
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conf {
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pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
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"I2S_WS", "I2S_MCLK";
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drive-strength = <12>;
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bias-pull-down;
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};
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};
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irrx_pins: irrx-pins {
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mux {
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function = "ir";
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groups = "ir_1_rx";
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};
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};
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irtx_pins: irtx-pins {
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mux {
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function = "ir";
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groups = "ir_1_tx";
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};
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};
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/* Parallel nand is shared pin with eMMC */
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parallel_nand_pins: parallel-nand-pins {
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mux {
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function = "flash";
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groups = "par_nand";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pcie1_pins: pcie1-pins {
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mux {
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function = "pcie";
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groups = "pcie1_pad_perst",
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"pcie1_0_waken",
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"pcie1_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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pwm7_pins: pwm1-2-pins {
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mux {
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function = "pwm";
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groups = "pwm_ch7_2";
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};
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};
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wled_pins: wled-pins {
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mux {
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function = "led";
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groups = "wled";
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};
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};
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sd0_pins_default: sd0-pins-default {
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mux {
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function = "sd";
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groups = "sd_0";
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};
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/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
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* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
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* DAT2, DAT3, CMD, CLK for SD respectively.
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*/
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conf-cmd-data {
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pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
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"I2S2_IN","I2S4_OUT";
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input-enable;
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drive-strength = <8>;
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bias-pull-up;
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};
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conf-clk {
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pins = "I2S3_OUT";
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drive-strength = <12>;
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bias-pull-down;
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};
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conf-cd {
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pins = "TXD3";
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bias-pull-up;
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};
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};
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sd0_pins_uhs: sd0-pins-uhs {
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mux {
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function = "sd";
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groups = "sd_0";
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};
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conf-cmd-data {
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pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
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"I2S2_IN","I2S4_OUT";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "I2S3_OUT";
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bias-pull-down;
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};
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};
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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spic0_pins: spic0-pins {
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mux {
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function = "spi";
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groups = "spic0_0";
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};
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};
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spic1_pins: spic1-pins {
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mux {
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function = "spi";
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groups = "spic1_0";
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};
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};
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/* SPI-NOR is shared pin with serial NAND */
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spi_nor_pins: spi-nor-pins {
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mux {
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function = "flash";
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groups = "spi_nor";
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};
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};
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/* serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
|
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
|
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groups = "uart0_0_tx_rx" ;
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};
|
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};
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uart2_pins: uart2-pins {
|
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mux {
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function = "uart";
|
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groups = "uart2_1_tx_rx" ;
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};
|
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};
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watchdog_pins: watchdog-pins {
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mux {
|
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function = "watchdog";
|
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groups = "watchdog";
|
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};
|
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};
|
||||
};
|
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&pwm {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&pwm7_pins>;
|
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status = "okay";
|
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};
|
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&pwrap {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&pmic_bus_pins>;
|
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status = "okay";
|
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};
|
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|
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&sata {
|
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status = "disable";
|
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};
|
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&sata_phy {
|
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status = "disable";
|
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};
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&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spic1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssusb {
|
||||
vusb33-supply = <®_3p3v>;
|
||||
vbus-supply = <®_5v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u3phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&watchdog_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user