lantiq: dts: define the SPI pins in {amazonse,ar9,vr9}.dtsi

Define the SPI pins in the corresponding SoCs.dtsi and assign them to
the SPI controller node. All known boards use CS4 and it's likely that
this is hardcoded in bootrom so this doesn't bother with having
per-board SPI pinmux settings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
This commit is contained in:
Martin Blumenstingl 2019-07-08 11:50:23 +02:00 committed by Adrian Schmutzler
parent b3bdfd5df5
commit edb0a936f0
12 changed files with 66 additions and 141 deletions

View File

@ -96,18 +96,6 @@
lantiq,open-drain = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs1";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&gsw {
@ -117,8 +105,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@1 {
compatible = "jedec,spi-nor";

View File

@ -131,18 +131,6 @@
lantiq,pull = <0>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&gsw {
@ -163,9 +151,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -118,20 +118,6 @@
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
&gpio {
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk", "spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&pcie0 {
status = "disabled";
};
@ -139,9 +125,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -222,24 +222,9 @@
lantiq,pull = <2>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&spi {
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
status = "okay";
flash@4 {

View File

@ -213,20 +213,6 @@
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&pcie0 {
@ -250,9 +236,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -35,22 +35,6 @@
label = "fritz7362sl:green:dect";
};
&gpio {
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&state_default {
nand {
lantiq,groups = "nand ale", "nand cle",
@ -67,8 +51,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
#address-cells = <1>;

View File

@ -194,18 +194,6 @@
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&pcie0 {
@ -232,9 +220,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -114,18 +114,6 @@
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&pci0 {
@ -136,9 +124,6 @@
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -237,26 +237,11 @@
lantiq,output = <1>;
};
};
pins_spi_default: pins_spi_default {
spi_in {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
spi_out {
lantiq,groups = "spi_do", "spi_clk",
"spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pins_spi_default>;
flash@4 {
compatible = "jedec,spi-nor";
reg = <4>;

View File

@ -133,6 +133,8 @@
"spi_frm";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
status = "disabled";
};
@ -155,6 +157,26 @@
lantiq,function = "mdio";
};
};
spi_pins: spi {
mux-0 {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
mux-1 {
lantiq,groups = "spi_do", "spi_clk";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
spi_cs4_pins: spi-cs4 {
mux {
lantiq,groups = "spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
asc1: serial@e100c00 {

View File

@ -160,6 +160,8 @@
"spi_frm";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
status = "disabled";
};
@ -175,6 +177,26 @@
lantiq,function = "mdio";
};
};
spi_pins: spi {
mux-0 {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
mux-1 {
lantiq,groups = "spi_do", "spi_clk";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
spi_cs4_pins: spi-cs4 {
mux {
lantiq,groups = "spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
stp: stp@e100bb0 {

View File

@ -202,6 +202,8 @@
"spi_frm";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
status = "disabled";
};
@ -217,6 +219,26 @@
lantiq,function = "mdio";
};
};
spi_pins: spi {
mux-0 {
lantiq,groups = "spi_di";
lantiq,function = "spi";
};
mux-1 {
lantiq,groups = "spi_do", "spi_clk";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
spi_cs4_pins: spi-cs4 {
mux {
lantiq,groups = "spi_cs4";
lantiq,function = "spi";
lantiq,output = <1>;
};
};
};
stp: stp@e100bb0 {