uboot-rockchip: update to v2021.07
Tested on NanoPi R2S Signed-off-by: David Bauer <mail@david-bauer.net>
This commit is contained in:
David Bauer
parent
ed9341dd78
commit
e68e80ead9
@ -5,10 +5,10 @@
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include $(TOPDIR)/rules.mk
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include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/kernel.mk
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include $(INCLUDE_DIR)/kernel.mk
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PKG_VERSION:=2021.04
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PKG_VERSION:=2021.07
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PKG_RELEASE:=1
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PKG_RELEASE:=1
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PKG_HASH:=0d438b1bb5cceb57a18ea2de4a0d51f7be5b05b98717df05938636e0aadfe11a
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PKG_HASH:=312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e
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PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
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PKG_MAINTAINER:=Tobias Maedel <openwrt@tbspace.de>
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@ -88,6 +88,7 @@ ifneq ($(OF_PLATDATA),)
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-plat.c $(PKG_BUILD_DIR)/tpl/dts/dt-plat.c
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-plat.c $(PKG_BUILD_DIR)/tpl/dts/dt-plat.c
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-structs-gen.h $(PKG_BUILD_DIR)/include/generated/dt-structs-gen.h
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-structs-gen.h $(PKG_BUILD_DIR)/include/generated/dt-structs-gen.h
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$(CP) $(PKG_BUILD_DIR)/of-platdata/$(OF_PLATDATA)/dt-decl.h $(PKG_BUILD_DIR)/include/generated/dt-decl.h
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endif
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endif
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$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
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$(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config
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@ -17,14 +17,12 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
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--- a/scripts/Makefile.spl
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--- a/scripts/Makefile.spl
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+++ b/scripts/Makefile.spl
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+++ b/scripts/Makefile.spl
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@@ -329,10 +329,6 @@ PHONY += dts_dir
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@@ -354,8 +354,6 @@ $(platdata-hdr) $(u-boot-spl-platdata_c)
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dts_dir:
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@# of OF_PLATDATA_INST and this might change between builds. Leaving old
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$(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts)
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@# ones around is confusing and it is possible that switching the
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@# setting again will use the old one instead of regenerating it.
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-include/generated/dt-structs-gen.h $(u-boot-spl-platdata_c) &: \
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- @rm -f $(u-boot-spl-all-platdata_c) $(u-boot-spl-all-platdata)
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- $(obj)/$(SPL_BIN).dtb dts_dir FORCE
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- $(call if_changed,dtoc)
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- $(call if_changed,dtoc)
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-
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ifdef CONFIG_SAMSUNG
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ifdef CONFIG_SAMSUNG
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ifdef CONFIG_VAR_SIZE_SPL
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ifdef CONFIG_VAR_SIZE_SPL
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VAR_SIZE_PARAM = --vs
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@ -1,290 +0,0 @@
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From b69b9f3f54732c303939eb748aad97cd4cf60168 Mon Sep 17 00:00:00 2001
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From: Xiaobo Tian <peterwillcn@gmail.com>
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Date: Sat, 27 Feb 2021 22:39:11 +0800
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Subject: [PATCH] arm64: rk3399: Add support NanoPi R4s
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NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
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dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support,
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including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port.
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port.It also has two GPIO headers which allows further peripherals to be used.
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The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
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[1] https://github.com/torvalds/linux/commit/e7a095908227fb3ccc86d001d9e13c9ae2bef8e6
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Signed-off-by: xiaobo <peterwillcn@gmail.com>
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Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi | 16 +++
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arch/arm/dts/rk3399-nanopi-r4s.dts | 138 +++++++++++++++++++++
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board/rockchip/evb_rk3399/MAINTAINERS | 6 +
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configs/nanopi-r4s-rk3399_defconfig | 62 +++++++++
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5 files changed, 223 insertions(+)
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create mode 100644 arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
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create mode 100644 arch/arm/dts/rk3399-nanopi-r4s.dts
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create mode 100644 configs/nanopi-r4s-rk3399_defconfig
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index dd4d4efed31..0a139473811 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -132,6 +132,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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rk3399-nanopi-m4.dtb \
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rk3399-nanopi-m4-2gb.dtb \
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rk3399-nanopi-neo4.dtb \
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+ rk3399-nanopi-r4s.dtb \
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rk3399-orangepi.dtb \
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rk3399-pinebook-pro.dtb \
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rk3399-puma-haikou.dtb \
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diff --git a/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
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new file mode 100644
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index 00000000000..cd1642527ba
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
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@@ -0,0 +1,16 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * RK3399-based FriendlyElec boards device tree source
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+ *
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+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
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+ *
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+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ *
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+ * Copyright (c) 2018 Collabora Ltd.
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+ * Copyright (c) 2019 Arm Ltd.
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+ * Copyright (C) 2020 Xiaobo <peterwillcn@gmail.com>
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+ */
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+
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+#include "rk3399-nanopi4-u-boot.dtsi"
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+#include "rk3399-sdram-lpddr4-100.dtsi"
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diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts
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new file mode 100644
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index 00000000000..6f2cf17bf1b
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
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@@ -0,0 +1,138 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
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+ *
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+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ *
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+ * Copyright (c) 2018 Collabora Ltd.
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+ * Copyright (c) 2019 Arm Ltd.
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+ * Copyright (C) 2020 Xiaobo <peterwillcn@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include "rk3399-nanopi4.dtsi"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R4S";
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+ compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
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+
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+ aliases {
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+ ethernet1 = &r8169;
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+ };
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+
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+ vdd_5v: vdd-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_5v";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ fan: pwm-fan {
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+ compatible = "pwm-fan";
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+ cooling-levels = <0 12 18 255>;
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+ #cooling-cells = <2>;
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+ fan-supply = <&vdd_5v>;
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+ pwms = <&pwm1 0 50000 0>;
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+ };
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+};
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+
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+&cpu_thermal {
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+ trips {
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+ cpu_warm: cpu_warm {
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+ temperature = <55000>;
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+ hysteresis = <2000>;
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+ type = "active";
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+ };
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+
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+ cpu_hot: cpu_hot {
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+ temperature = <65000>;
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+ hysteresis = <2000>;
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+ type = "active";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map2 {
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+ trip = <&cpu_warm>;
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+ cooling-device = <&fan THERMAL_NO_LIMIT 1>;
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+ };
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+
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+ map3 {
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+ trip = <&cpu_hot>;
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+ cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
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+ };
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+ };
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+};
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+
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+&emmc_phy {
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+ status = "disabled";
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+};
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+
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+&fusb0 {
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+ status = "disabled";
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+};
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+
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+&leds {
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+ lan_led: led-1 {
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+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r4s:green:lan";
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+ };
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+
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+ wan_led: led-2 {
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+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ label = "nanopi-r4s:green:wan";
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+ };
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+};
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+
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+&leds_gpio {
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+ rockchip,pins =
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+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
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+ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,
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+ <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
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+};
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+
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+&pcie0 {
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+ max-link-speed = <1>;
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+ num-lanes = <1>;
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+ vpcie3v3-supply = <&vcc3v3_sys>;
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+
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+ pcie@0 {
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+ reg = <0x00000000 0 0 0 0>;
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+
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+ r8169: pcie@0,0 {
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+ reg = <0x000000 0 0 0 0>;
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+ local-mac-address = [ 00 00 00 00 00 00 ];
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+ };
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+ };
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+};
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+
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+&sdhci {
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+ status = "disabled";
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+};
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+
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+&sdio0 {
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+ status = "disabled";
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+};
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+
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+&sdmmc {
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+ host-index-min = <1>;
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+};
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+
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+&u2phy0_host {
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+ phy-supply = <&vdd_5v>;
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+};
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+
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+&u2phy1_host {
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+ status = "disabled";
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+};
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+
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+&usbdrd_dwc3_0 {
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+ dr_mode = "host";
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+};
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+
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+&vcc3v3_sys {
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+ vin-supply = <&vcc5v0_sys>;
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+};
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diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
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index 4c889e06a63..3b9d60eccd4 100644
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--- a/board/rockchip/evb_rk3399/MAINTAINERS
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+++ b/board/rockchip/evb_rk3399/MAINTAINERS
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@@ -55,6 +55,12 @@ S: Maintained
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F: configs/nanopi-neo4-rk3399_defconfig
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F: arch/arm/dts/rk3399-nanopi-neo4-u-boot.dtsi
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+NANOPI-R4S
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+M: Xiaobo Tian <peterwillcn@gmail.com>
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+S: Maintained
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+F: configs/nanopi-r4s-rk3399_defconfig
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+F: arch/arm/dts/rk3399-nanopi-r4s-u-boot.dtsi
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+
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ORANGEPI-RK3399
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
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new file mode 100644
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index 00000000000..0a3c28b0126
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--- /dev/null
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+++ b/configs/nanopi-r4s-rk3399_defconfig
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@@ -0,0 +1,62 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00200000
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|
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+CONFIG_ENV_OFFSET=0x3F8000
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+CONFIG_ROCKCHIP_RK3399=y
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+CONFIG_TARGET_EVB_RK3399=y
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_DEBUG_UART_BASE=0xFF1A0000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
||||||
+CONFIG_SPL_STACK_R=y
|
|
||||||
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
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|
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+CONFIG_TPL=y
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|
||||||
+CONFIG_CMD_BOOTZ=y
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|
||||||
+CONFIG_CMD_GPT=y
|
|
||||||
+CONFIG_CMD_MMC=y
|
|
||||||
+CONFIG_CMD_USB=y
|
|
||||||
+# CONFIG_CMD_SETEXPR is not set
|
|
||||||
+CONFIG_CMD_TIME=y
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|
||||||
+CONFIG_SPL_OF_CONTROL=y
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
|
|
||||||
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
||||||
+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
+CONFIG_ROCKCHIP_GPIO=y
|
|
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MMC_DW=y
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|
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+CONFIG_MMC_DW_ROCKCHIP=y
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|
||||||
+CONFIG_MMC_SDHCI=y
|
|
||||||
+CONFIG_MMC_SDHCI_ROCKCHIP=y
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|
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+CONFIG_DM_ETH=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_PWM=y
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+CONFIG_REGULATOR_RK8XX=y
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||||||
+CONFIG_PWM_ROCKCHIP=y
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|
||||||
+CONFIG_RAM_RK3399_LPDDR4=y
|
|
||||||
+CONFIG_BAUDRATE=1500000
|
|
||||||
+CONFIG_DEBUG_UART_SHIFT=2
|
|
||||||
+CONFIG_SYSRESET=y
|
|
||||||
+CONFIG_USB=y
|
|
||||||
+CONFIG_USB_XHCI_HCD=y
|
|
||||||
+CONFIG_USB_XHCI_DWC3=y
|
|
||||||
+CONFIG_USB_EHCI_HCD=y
|
|
||||||
+CONFIG_USB_EHCI_GENERIC=y
|
|
||||||
+CONFIG_USB_KEYBOARD=y
|
|
||||||
+CONFIG_USB_HOST_ETHER=y
|
|
||||||
+CONFIG_USB_ETHER_ASIX=y
|
|
||||||
+CONFIG_USB_ETHER_ASIX88179=y
|
|
||||||
+CONFIG_USB_ETHER_MCS7830=y
|
|
||||||
+CONFIG_USB_ETHER_RTL8152=y
|
|
||||||
+CONFIG_USB_ETHER_SMSC95XX=y
|
|
||||||
+CONFIG_DM_VIDEO=y
|
|
||||||
+CONFIG_DISPLAY=y
|
|
||||||
+CONFIG_VIDEO_ROCKCHIP=y
|
|
||||||
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
|
||||||
+CONFIG_SPL_TINY_MEMSET=y
|
|
||||||
+CONFIG_ERRNO_STR=y
|
|
||||||
@ -0,0 +1,23 @@
|
|||||||
|
/*
|
||||||
|
* DO NOT MODIFY
|
||||||
|
*
|
||||||
|
* Declares externs for all device/uclass instances.
|
||||||
|
* This was generated by dtoc from a .dtb (device tree binary) file.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <dm/device-internal.h>
|
||||||
|
#include <dm/uclass-internal.h>
|
||||||
|
|
||||||
|
/* driver declarations - these allow DM_DRIVER_GET() to be used */
|
||||||
|
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
|
||||||
|
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
|
||||||
|
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
|
||||||
|
extern U_BOOT_DRIVER(ns16550_serial);
|
||||||
|
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
|
||||||
|
|
||||||
|
/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
|
||||||
|
extern UCLASS_DRIVER(clk);
|
||||||
|
extern UCLASS_DRIVER(mmc);
|
||||||
|
extern UCLASS_DRIVER(ram);
|
||||||
|
extern UCLASS_DRIVER(serial);
|
||||||
|
extern UCLASS_DRIVER(syscon);
|
||||||
@ -12,7 +12,23 @@
|
|||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <dt-structs.h>
|
#include <dt-structs.h>
|
||||||
|
|
||||||
/* Node /clock-controller@ff440000 index 0 */
|
/*
|
||||||
|
* driver_info declarations, ordered by 'struct driver_info' linker_list idx:
|
||||||
|
*
|
||||||
|
* idx driver_info driver
|
||||||
|
* --- -------------------- --------------------
|
||||||
|
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
|
||||||
|
* 1: dmc rockchip_rk3328_dmc
|
||||||
|
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
|
||||||
|
* 3: serial_at_ff130000 ns16550_serial
|
||||||
|
* 4: syscon_at_ff100000 rockchip_rk3328_grf
|
||||||
|
* --- -------------------- --------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Node /clock-controller@ff440000 index 0
|
||||||
|
* driver rockchip_rk3328_cru parent None
|
||||||
|
*/
|
||||||
static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
|
static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
|
||||||
.reg = {0xff440000, 0x1000},
|
.reg = {0xff440000, 0x1000},
|
||||||
.rockchip_grf = 0x3a,
|
.rockchip_grf = 0x3a,
|
||||||
@ -24,7 +40,10 @@ U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
|
|||||||
.parent_idx = -1,
|
.parent_idx = -1,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Node /dmc index 1 */
|
/*
|
||||||
|
* Node /dmc index 1
|
||||||
|
* driver rockchip_rk3328_dmc parent None
|
||||||
|
*/
|
||||||
static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
|
static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
|
||||||
.reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
|
.reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
|
||||||
0xff720000, 0x1000, 0xff798000, 0x1000},
|
0xff720000, 0x1000, 0xff798000, 0x1000},
|
||||||
@ -61,7 +80,10 @@ U_BOOT_DRVINFO(dmc) = {
|
|||||||
.parent_idx = -1,
|
.parent_idx = -1,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Node /mmc@ff500000 index 2 */
|
/*
|
||||||
|
* Node /mmc@ff500000 index 2
|
||||||
|
* driver rockchip_rk3288_dw_mshc parent None
|
||||||
|
*/
|
||||||
static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
|
static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
|
||||||
.bus_width = 0x4,
|
.bus_width = 0x4,
|
||||||
.cap_sd_highspeed = true,
|
.cap_sd_highspeed = true,
|
||||||
@ -92,7 +114,10 @@ U_BOOT_DRVINFO(mmc_at_ff500000) = {
|
|||||||
.parent_idx = -1,
|
.parent_idx = -1,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Node /serial@ff130000 index 3 */
|
/*
|
||||||
|
* Node /serial@ff130000 index 3
|
||||||
|
* driver ns16550_serial parent None
|
||||||
|
*/
|
||||||
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
|
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
|
||||||
.clock_frequency = 0x16e3600,
|
.clock_frequency = 0x16e3600,
|
||||||
.clocks = {
|
.clocks = {
|
||||||
@ -114,7 +139,10 @@ U_BOOT_DRVINFO(serial_at_ff130000) = {
|
|||||||
.parent_idx = -1,
|
.parent_idx = -1,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Node /syscon@ff100000 index 4 */
|
/*
|
||||||
|
* Node /syscon@ff100000 index 4
|
||||||
|
* driver rockchip_rk3328_grf parent None
|
||||||
|
*/
|
||||||
static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
|
static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
|
||||||
.reg = {0xff100000, 0x1000},
|
.reg = {0xff100000, 0x1000},
|
||||||
};
|
};
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user