ramips: Improve TP-Link Archer C20i support
Improve / finalise TP-Link Archer C20i support. Signed-off-by: P.Wassi <p.wassi@gmx.at>
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@ -78,6 +78,12 @@ broadway)
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set_usb_led "$board:red:diskmounted"
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set_wifi_led "$board:red:wps_active"
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;;
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c20i)
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ucidef_set_led_switch "lan" "lan" "$board:blue:lan" "switch0" "0x1e"
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ucidef_set_led_switch "wan" "wan" "$board:blue:wan" "switch0" "0x01"
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set_usb_led "$board:blue:usb" "2-1"
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ucidef_set_led_wlan "wlan" "wlan" "$board:blue:wlan" "phy0radio"
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;;
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c50)
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ucidef_set_led_default "power" "power" "tp-link:blue:power" "0"
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ucidef_set_led_netdev "lan" "lan" "tp-link:blue:lan" "eth0.2"
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@ -114,6 +114,7 @@ ramips_setup_interfaces()
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atp-52b|\
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awm002-evb|\
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awm003-evb|\
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c20i|\
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c50|\
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dir-645|\
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dir-860l-b1|\
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@ -12,20 +12,57 @@
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gpio-leds {
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compatible = "gpio-leds";
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lan {
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label = "c20i:blue:lan";
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gpios = <&gpio0 1 1>;
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};
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usb {
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label = "c20i:blue:usb";
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gpios = <&gpio0 11 1>;
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};
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wps {
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label = "c20i:blue:wps";
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gpios = <&gpio1 15 1>;
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};
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wan {
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label = "c20i:blue:wan";
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gpios = <&gpio2 0 1>;
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};
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wlan {
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label = "c20i:blue:wlan";
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gpios = <&gpio3 0 1>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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rfkill {
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label = "rfkill";
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gpios = <&gpio0 2 1>;
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linux,code = <0xf7>;
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};
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reset_wps {
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label = "reset_wps";
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gpios = <&gpio0 13 1>;
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linux,code = <0x198>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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@ -73,7 +110,7 @@
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
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ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
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ralink,function = "gpio";
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};
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};
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@ -81,7 +118,6 @@
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ðernet {
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pinctrl-names = "default";
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pinctrl-0 = <&ephy_pins>;
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mtd-mac-address = <&rom 0xf100>;
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mediatek,portmap = "wllll";
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};
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@ -194,6 +194,7 @@ CONFIG_SPI_MASTER=y
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CONFIG_SPI_RT2880=y
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CONFIG_SRCU=y
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CONFIG_SWCONFIG=y
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CONFIG_SWCONFIG_LEDS=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_HAS_CPU_MIPS32_R2=y
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