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ramips: mt7620: fix external PHY autopolling

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The port initialisation is based on assumption that phy address and
port number is the same. SoC allow different numbers and some board
have it.

Use phy address instead the port number to make sure that correct
addresses are polled.

In situation when only one PHY with address 0x0 is conected to
port 4, autopolling is broken.

This patch make autopolling correct when port number and phy address
are different.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
This commit is contained in:
Pawel Dembicki 2018-10-29 17:30:22 +00:00 committed by Petr Štetiar
parent f96c7f697f
commit c02a9a2514
1 changed files with 6 additions and 4 deletions
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10
target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/soc_mt7620.c
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@ -118,7 +118,7 @@ static void mt7620_set_mac(struct fe_priv *priv, unsigned char *mac)
spin_unlock_irqrestore(&priv->page_lock, flags); spin_unlock_irqrestore(&priv->page_lock, flags);
} }
static void mt7620_auto_poll(struct mt7620_gsw *gsw) static void mt7620_auto_poll(struct mt7620_gsw *gsw, int port)
{ {
int phy; int phy;
int lsb = -1, msb = 0; int lsb = -1, msb = 0;
@ -129,7 +129,9 @@ static void mt7620_auto_poll(struct mt7620_gsw *gsw)
msb = phy; msb = phy;
} }
if (lsb == msb) if (lsb == msb && port == 4)
msb++;
else if (lsb == msb && port == 5)
lsb--; lsb--;
mtk_switch_w32(gsw, PHY_AN_EN | PHY_PRE_EN | PMY_MDC_CONF(5) | mtk_switch_w32(gsw, PHY_AN_EN | PHY_PRE_EN | PMY_MDC_CONF(5) |
@ -242,8 +244,8 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
mtk_switch_w32(gsw, val, GSW_REG_PORT_PMCR(id)); mtk_switch_w32(gsw, val, GSW_REG_PORT_PMCR(id));
fe_connect_phy_node(priv, priv->phy->phy_node[id], id); fe_connect_phy_node(priv, priv->phy->phy_node[id], id);
gsw->autopoll |= BIT(id); gsw->autopoll |= BIT(be32_to_cpup(phy_addr));
mt7620_auto_poll(gsw); mt7620_auto_poll(gsw,id);
return; return;
} }
} }