refresh patches
SVN-Revision: 25555
This commit is contained in:
parent
238721c650
commit
82608a62ad
@ -1,6 +1,6 @@
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--- a/gcc/builtins.c
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+++ b/gcc/builtins.c
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@@ -10779,7 +10779,7 @@
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@@ -10779,7 +10779,7 @@ validate_arglist (const_tree callexpr, .
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do
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{
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@ -11,7 +11,7 @@
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case 0:
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--- a/gcc/calls.c
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+++ b/gcc/calls.c
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@@ -3496,7 +3496,7 @@
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@@ -3496,7 +3496,7 @@ emit_library_call_value_1 (int retval, r
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for (; count < nargs; count++)
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{
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rtx val = va_arg (p, rtx);
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@ -20,7 +20,7 @@
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/* We cannot convert the arg value to the mode the library wants here;
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must do it earlier where we know the signedness of the arg. */
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--- a/gcc/config/avr32/avr32.c
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--- /dev/null
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+++ b/gcc/config/avr32/avr32.c
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@@ -0,0 +1,7858 @@
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+/*
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@ -7881,7 +7881,7 @@
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+ set_optab_libfunc (sdiv_optab, SFmode, "__avr32_f32_div");
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+ }
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+}
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--- a/gcc/config/avr32/avr32-elf.h
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--- /dev/null
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+++ b/gcc/config/avr32/avr32-elf.h
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@@ -0,0 +1,86 @@
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+/*
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@ -7970,7 +7970,7 @@
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+ builtin_define ("__AVR32_NO_MUL__"); \
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+ } \
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+ while (0)
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--- a/gcc/config/avr32/avr32.h
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--- /dev/null
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+++ b/gcc/config/avr32/avr32.h
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@@ -0,0 +1,3344 @@
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+/*
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@ -11317,7 +11317,7 @@
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+#endif
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+
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+#endif
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--- a/gcc/config/avr32/avr32.md
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--- /dev/null
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+++ b/gcc/config/avr32/avr32.md
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@@ -0,0 +1,4926 @@
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+;; AVR32 machine description file.
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@ -16246,11 +16246,11 @@
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+
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+;; Load the FP coprAocessor patterns
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+(include "fpcp.md")
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--- a/gcc/config/avr32/avr32-modes.def
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--- /dev/null
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+++ b/gcc/config/avr32/avr32-modes.def
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@@ -0,0 +1 @@
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+VECTOR_MODES (INT, 4); /* V4QI V2HI */
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--- a/gcc/config/avr32/avr32.opt
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--- /dev/null
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+++ b/gcc/config/avr32/avr32.opt
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@@ -0,0 +1,81 @@
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+; Options for the ATMEL AVR32 port of the compiler.
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@ -16334,7 +16334,7 @@
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+Target Report Undocumented Mask(COND_EXEC_BEFORE_RELOAD)
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+Enable experimental conditional execution preparation before the reload stage.
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+
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--- a/gcc/config/avr32/avr32-protos.h
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--- /dev/null
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+++ b/gcc/config/avr32/avr32-protos.h
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@@ -0,0 +1,197 @@
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+/*
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@ -16534,7 +16534,7 @@
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+
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+
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+#endif /* AVR32_PROTOS_H */
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--- a/gcc/config/avr32/crti.asm
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--- /dev/null
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+++ b/gcc/config/avr32/crti.asm
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@@ -0,0 +1,64 @@
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+/*
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@ -16601,7 +16601,7 @@
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+1: .long 0b - _GLOBAL_OFFSET_TABLE_
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+2:
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+
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--- a/gcc/config/avr32/crtn.asm
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--- /dev/null
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+++ b/gcc/config/avr32/crtn.asm
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@@ -0,0 +1,44 @@
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+/* Copyright (C) 2001 Free Software Foundation, Inc.
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@ -16648,7 +16648,7 @@
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+ .section ".fini"
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+ ldm sp++, r6, pc
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+
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--- a/gcc/config/avr32/fpcp.md
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--- /dev/null
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+++ b/gcc/config/avr32/fpcp.md
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@@ -0,0 +1,551 @@
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+;; AVR32 machine description file for Floating-Point instructions.
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@ -17202,7 +17202,7 @@
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+ [(set_attr "type" "fstm")
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+ (set_attr "length" "4")
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+ (set_attr "cc" "none")])
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--- a/gcc/config/avr32/lib1funcs.S
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--- /dev/null
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+++ b/gcc/config/avr32/lib1funcs.S
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@@ -0,0 +1,2874 @@
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+/* Macro for moving immediate value to register. */
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@ -20079,7 +20079,7 @@
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+1:
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+ ret r9
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+#endif
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--- a/gcc/config/avr32/lib2funcs.S
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--- /dev/null
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+++ b/gcc/config/avr32/lib2funcs.S
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@@ -0,0 +1,21 @@
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+ .align 4
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@ -20103,7 +20103,7 @@
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+
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+
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+
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--- a/gcc/config/avr32/linux-elf.h
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--- /dev/null
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+++ b/gcc/config/avr32/linux-elf.h
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@@ -0,0 +1,151 @@
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+/*
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@ -20257,7 +20257,7 @@
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+
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+#define LINK_GCC_C_SEQUENCE_SPEC \
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+ "%{static:--start-group} %G %L %{static:--end-group}%{!static:%G}"
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--- a/gcc/config/avr32/predicates.md
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--- /dev/null
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+++ b/gcc/config/avr32/predicates.md
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@@ -0,0 +1,386 @@
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+;; AVR32 predicates file.
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@ -20646,7 +20646,7 @@
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+(define_predicate "avr32_mov_immediate_operand"
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+ (and (match_operand 0 "immediate_operand")
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+ (match_test "avr32_const_ok_for_move(INTVAL(op))")))
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--- a/gcc/config/avr32/simd.md
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--- /dev/null
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+++ b/gcc/config/avr32/simd.md
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@@ -0,0 +1,145 @@
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+;; AVR32 machine description file for SIMD instructions.
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@ -20794,7 +20794,7 @@
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+ "psubadd.h\t%0, %1:b, %2:b"
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+ [(set_attr "length" "4")
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+ (set_attr "type" "alu")])
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--- a/gcc/config/avr32/sync.md
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--- /dev/null
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+++ b/gcc/config/avr32/sync.md
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@@ -0,0 +1,244 @@
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+;;=================================================================
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@ -21041,7 +21041,7 @@
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+ "xchg\t%0, %p1, %2"
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+ [(set_attr "length" "4")]
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+ )
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--- a/gcc/config/avr32/t-avr32
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--- /dev/null
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+++ b/gcc/config/avr32/t-avr32
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@@ -0,0 +1,94 @@
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+
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@ -21138,7 +21138,7 @@
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+
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+
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+
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--- a/gcc/config/avr32/t-avr32-linux
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--- /dev/null
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+++ b/gcc/config/avr32/t-avr32-linux
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@@ -0,0 +1,94 @@
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+
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@ -21235,7 +21235,7 @@
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+
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+
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+
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--- a/gcc/config/avr32/t-elf
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--- /dev/null
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+++ b/gcc/config/avr32/t-elf
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@@ -0,0 +1,16 @@
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+
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@ -21254,7 +21254,7 @@
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+
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+LIBGCC = stmp-multilib
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+INSTALL_LIBGCC = install-multilib
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--- a/gcc/config/avr32/uclinux-elf.h
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--- /dev/null
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+++ b/gcc/config/avr32/uclinux-elf.h
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@@ -0,0 +1,20 @@
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+
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@ -21291,7 +21291,7 @@
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address of non-fixed mapped segments by a (relatively) small amount.
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--- a/gcc/config.gcc
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+++ b/gcc/config.gcc
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@@ -834,6 +834,24 @@
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@@ -834,6 +834,24 @@ avr-*-*)
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tm_file="avr/avr.h dbxelf.h"
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use_fixproto=yes
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;;
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@ -21316,7 +21316,7 @@
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bfin*-elf*)
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tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h"
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tmake_file=bfin/t-bfin-elf
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@@ -2950,6 +2968,32 @@
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@@ -2950,6 +2968,32 @@ case "${target}" in
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fi
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;;
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@ -21351,7 +21351,7 @@
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case "$with_cpu" in
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--- a/gcc/configure.ac
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+++ b/gcc/configure.ac
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@@ -2174,10 +2174,9 @@
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@@ -2174,10 +2174,9 @@ L2:],
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as_ver=`$gcc_cv_as --version 2>/dev/null | sed 1q`
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if echo "$as_ver" | grep GNU > /dev/null; then
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changequote(,)dnl
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@ -21365,7 +21365,7 @@
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changequote([,])dnl
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if test $as_major -eq 2 && test $as_minor -lt 11
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then :
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@@ -3077,7 +3076,7 @@
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@@ -3077,7 +3076,7 @@ esac
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case "$target" in
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i?86*-*-* | mips*-*-* | alpha*-*-* | powerpc*-*-* | sparc*-*-* | m68*-*-* \
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| x86_64*-*-* | hppa*-*-* | arm*-*-* | strongarm*-*-* | xscale*-*-* \
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@ -21376,7 +21376,7 @@
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ia64*-*-* | s390*-*-*)
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--- a/gcc/doc/extend.texi
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+++ b/gcc/doc/extend.texi
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@@ -2336,7 +2336,7 @@
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@@ -2336,7 +2336,7 @@ This attribute is ignored for R8C target
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@item interrupt
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@cindex interrupt handler functions
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@ -21385,7 +21385,7 @@
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and Xstormy16 ports to indicate that the specified function is an
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interrupt handler. The compiler will generate function entry and exit
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sequences suitable for use in an interrupt handler when this attribute
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@@ -2356,6 +2356,15 @@
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@@ -2356,6 +2356,15 @@ void f () __attribute__ ((interrupt ("IR
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Permissible values for this parameter are: IRQ, FIQ, SWI, ABORT and UNDEF@.
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@ -21401,7 +21401,7 @@
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On ARMv7-M the interrupt type is ignored, and the attribute means the function
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may be called with a word aligned stack pointer.
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@@ -3925,6 +3934,23 @@
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@@ -3925,6 +3934,23 @@ placed in either the @code{.bss_below100
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@end table
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@ -21425,7 +21425,7 @@
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@subsection AVR Variable Attributes
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@table @code
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@@ -6708,6 +6734,7 @@
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@@ -6708,6 +6734,7 @@ instructions, but allow the compiler to
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* Alpha Built-in Functions::
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* ARM iWMMXt Built-in Functions::
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* ARM NEON Intrinsics::
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@ -21433,7 +21433,7 @@
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* Blackfin Built-in Functions::
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* FR-V Built-in Functions::
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* X86 Built-in Functions::
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@@ -6955,6 +6982,74 @@
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@@ -6955,6 +6982,74 @@ when the @option{-mfpu=neon} switch is u
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@include arm-neon-intrinsics.texi
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@ -21510,7 +21510,7 @@
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--- a/gcc/doc/invoke.texi
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+++ b/gcc/doc/invoke.texi
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@@ -195,7 +195,7 @@
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@@ -195,7 +195,7 @@ in the following sections.
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-fvisibility-ms-compat @gol
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-Wabi -Wctor-dtor-privacy @gol
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-Wnon-virtual-dtor -Wreorder @gol
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@ -21519,7 +21519,7 @@
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-Wno-non-template-friend -Wold-style-cast @gol
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-Woverloaded-virtual -Wno-pmf-conversions @gol
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-Wsign-promo}
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@@ -609,6 +609,12 @@
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@@ -609,6 +609,12 @@ Objective-C and Objective-C++ Dialects}.
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-mauto-incdec -minmax -mlong-calls -mshort @gol
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-msoft-reg-count=@var{count}}
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@ -21532,7 +21532,7 @@
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@emph{MCore Options}
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@gccoptlist{-mhardlit -mno-hardlit -mdiv -mno-div -mrelax-immediates @gol
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-mno-relax-immediates -mwide-bitfields -mno-wide-bitfields @gol
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@@ -3163,13 +3169,11 @@
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@@ -3163,13 +3169,11 @@ requiring @option{-O}.
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If you want to warn about code which uses the uninitialized value of the
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variable in its own initializer, use the @option{-Winit-self} option.
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@ -21551,7 +21551,7 @@
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Note that there may be no warning about a variable that is used only
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to compute a value that itself is never used, because such
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@@ -7034,10 +7038,6 @@
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@@ -7034,10 +7038,6 @@ If number of candidates in the set is sm
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we always try to remove unnecessary ivs from the set during its
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optimization when a new iv is added to the set.
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@ -21562,7 +21562,7 @@
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@item omega-max-vars
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The maximum number of variables in an Omega constraint system.
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The default value is 128.
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@@ -8363,6 +8363,7 @@
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@@ -8363,6 +8363,7 @@ platform.
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* ARC Options::
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* ARM Options::
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* AVR Options::
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@ -21570,7 +21570,7 @@
|
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* Blackfin Options::
|
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* CRIS Options::
|
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* CRX Options::
|
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@@ -8834,6 +8835,120 @@
|
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@@ -8834,6 +8835,120 @@ comply to the C standards, but it will p
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size.
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@end table
|
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@ -21691,7 +21691,7 @@
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@node Blackfin Options
|
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@subsection Blackfin Options
|
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@cindex Blackfin Options
|
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@@ -8889,29 +9004,12 @@
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@@ -8889,29 +9004,12 @@ When enabled, the compiler will ensure t
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contain speculative loads after jump instructions. If this option is used,
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@code{__WORKAROUND_SPECULATIVE_LOADS} is defined.
|
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|
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@ -21721,7 +21721,7 @@
|
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|
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@item -mstack-check-l1
|
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@opindex mstack-check-l1
|
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@@ -8925,11 +9023,6 @@
|
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@@ -8925,11 +9023,6 @@ This allows for execute in place and sha
|
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without virtual memory management. This option implies @option{-fPIC}.
|
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With a @samp{bfin-elf} target, this option implies @option{-msim}.
|
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|
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@ -21733,7 +21733,7 @@
|
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@item -mleaf-id-shared-library
|
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@opindex mleaf-id-shared-library
|
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Generate code that supports shared libraries via the library ID method,
|
||||
@@ -8971,11 +9064,6 @@
|
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@@ -8971,11 +9064,6 @@ call on this register. This switch is n
|
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will lie outside of the 24 bit addressing range of the offset based
|
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version of subroutine call instruction.
|
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|
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@ -21747,7 +21747,7 @@
|
||||
Link with the fast floating-point library. This library relaxes some of
|
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--- a/gcc/doc/md.texi
|
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+++ b/gcc/doc/md.texi
|
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@@ -1681,6 +1681,58 @@
|
||||
@@ -1681,6 +1681,58 @@ A memory reference suitable for iWMMXt l
|
||||
A memory reference suitable for the ARMv4 ldrsb instruction.
|
||||
@end table
|
||||
|
||||
@ -21808,7 +21808,7 @@
|
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@item l
|
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--- a/gcc/expmed.c
|
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+++ b/gcc/expmed.c
|
||||
@@ -463,9 +463,9 @@
|
||||
@@ -463,9 +463,9 @@ store_bit_field_1 (rtx str_rtx, unsigned
|
||||
? ((GET_MODE_SIZE (fieldmode) >= UNITS_PER_WORD
|
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|| GET_MODE_SIZE (GET_MODE (op0)) == GET_MODE_SIZE (fieldmode))
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&& byte_offset % GET_MODE_SIZE (fieldmode) == 0)
|
||||
@ -21822,7 +21822,7 @@
|
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op0 = adjust_address (op0, fieldmode, offset);
|
||||
--- a/gcc/expr.c
|
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+++ b/gcc/expr.c
|
||||
@@ -52,6 +52,7 @@
|
||||
@@ -52,6 +52,7 @@ along with GCC; see the file COPYING3.
|
||||
#include "tree-flow.h"
|
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#include "target.h"
|
||||
#include "timevar.h"
|
||||
@ -21830,7 +21830,7 @@
|
||||
#include "df.h"
|
||||
#include "diagnostic.h"
|
||||
|
||||
@@ -3620,16 +3621,17 @@
|
||||
@@ -3620,16 +3621,17 @@ emit_single_push_insn (enum machine_mode
|
||||
}
|
||||
else
|
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{
|
||||
@ -21855,7 +21855,7 @@
|
||||
}
|
||||
|
||||
dest = gen_rtx_MEM (mode, dest_addr);
|
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@@ -5739,7 +5741,8 @@
|
||||
@@ -5739,7 +5741,8 @@ store_field (rtx target, HOST_WIDE_INT b
|
||||
is a bit field, we cannot use addressing to access it.
|
||||
Use bit-field techniques or SUBREG to store in it. */
|
||||
|
||||
@ -21865,7 +21865,7 @@
|
||||
|| (mode != BLKmode && ! direct_store[(int) mode]
|
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&& GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
|
||||
&& GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
|
||||
@@ -5896,7 +5899,19 @@
|
||||
@@ -5896,7 +5899,19 @@ get_inner_reference (tree exp, HOST_WIDE
|
||||
{
|
||||
tree field = TREE_OPERAND (exp, 1);
|
||||
size_tree = DECL_SIZE (field);
|
||||
@ -21886,7 +21886,7 @@
|
||||
mode = DECL_MODE (field);
|
||||
else if (DECL_MODE (field) == BLKmode)
|
||||
blkmode_bitfield = true;
|
||||
@@ -7889,7 +7904,8 @@
|
||||
@@ -7889,7 +7904,8 @@ expand_expr_real_1 (tree exp, rtx target
|
||||
by doing the extract into an object as wide as the field
|
||||
(which we know to be the width of a basic mode), then
|
||||
storing into memory, and changing the mode to BLKmode. */
|
||||
@ -21898,7 +21898,7 @@
|
||||
&& GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
|
||||
--- a/gcc/function.c
|
||||
+++ b/gcc/function.c
|
||||
@@ -2715,7 +2715,11 @@
|
||||
@@ -2715,7 +2715,11 @@ assign_parm_setup_reg (struct assign_par
|
||||
SET_DECL_RTL (parm, parmreg);
|
||||
|
||||
/* Copy the value into the register. */
|
||||
@ -21913,7 +21913,7 @@
|
||||
int save_tree_used;
|
||||
--- a/gcc/genemit.c
|
||||
+++ b/gcc/genemit.c
|
||||
@@ -121,6 +121,24 @@
|
||||
@@ -121,6 +121,24 @@ max_operand_vec (rtx insn, int arg)
|
||||
}
|
||||
|
||||
static void
|
||||
@ -21938,7 +21938,7 @@
|
||||
print_code (RTX_CODE code)
|
||||
{
|
||||
const char *p1;
|
||||
@@ -406,18 +424,16 @@
|
||||
@@ -406,18 +424,16 @@ gen_insn (rtx insn, int lineno)
|
||||
fatal ("match_dup operand number has no match_operand");
|
||||
|
||||
/* Output the function name and argument declarations. */
|
||||
@ -21963,7 +21963,7 @@
|
||||
/* Output code to construct and return the rtl for the instruction body. */
|
||||
|
||||
if (XVECLEN (insn, 1) == 1)
|
||||
@@ -461,16 +477,12 @@
|
||||
@@ -461,16 +477,12 @@ gen_expand (rtx expand)
|
||||
operands = max_operand_vec (expand, 1);
|
||||
|
||||
/* Output the function name and argument declarations. */
|
||||
@ -21984,7 +21984,7 @@
|
||||
printf ("{\n");
|
||||
|
||||
/* If we don't have any C code to write, only one insn is being written,
|
||||
@@ -480,6 +492,8 @@
|
||||
@@ -480,6 +492,8 @@ gen_expand (rtx expand)
|
||||
&& operands > max_dup_opno
|
||||
&& XVECLEN (expand, 1) == 1)
|
||||
{
|
||||
@ -21993,7 +21993,7 @@
|
||||
printf (" return ");
|
||||
gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND, NULL);
|
||||
printf (";\n}\n\n");
|
||||
@@ -493,6 +507,7 @@
|
||||
@@ -493,6 +507,7 @@ gen_expand (rtx expand)
|
||||
for (; i <= max_scratch_opno; i++)
|
||||
printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
|
||||
printf (" rtx _val = 0;\n");
|
||||
@ -22003,7 +22003,7 @@
|
||||
/* The fourth operand of DEFINE_EXPAND is some code to be executed
|
||||
--- a/gcc/genflags.c
|
||||
+++ b/gcc/genflags.c
|
||||
@@ -127,7 +127,6 @@
|
||||
@@ -127,7 +127,6 @@ static void
|
||||
gen_proto (rtx insn)
|
||||
{
|
||||
int num = num_operands (insn);
|
||||
@ -22011,7 +22011,7 @@
|
||||
const char *name = XSTR (insn, 0);
|
||||
int truth = maybe_eval_c_test (XSTR (insn, 2));
|
||||
|
||||
@@ -158,12 +157,7 @@
|
||||
@@ -158,12 +157,7 @@ gen_proto (rtx insn)
|
||||
if (num == 0)
|
||||
fputs ("void", stdout);
|
||||
else
|
||||
@ -22025,7 +22025,7 @@
|
||||
|
||||
puts (");");
|
||||
|
||||
@@ -173,12 +167,7 @@
|
||||
@@ -173,12 +167,7 @@ gen_proto (rtx insn)
|
||||
{
|
||||
printf ("static inline rtx\ngen_%s", name);
|
||||
if (num > 0)
|
||||
@ -22041,7 +22041,7 @@
|
||||
puts ("{\n return 0;\n}");
|
||||
--- a/gcc/genoutput.c
|
||||
+++ b/gcc/genoutput.c
|
||||
@@ -386,7 +386,7 @@
|
||||
@@ -386,7 +386,7 @@ output_insn_data (void)
|
||||
}
|
||||
|
||||
if (d->name && d->name[0] != '*')
|
||||
@ -22052,7 +22052,7 @@
|
||||
|
||||
--- a/gcc/ifcvt.c
|
||||
+++ b/gcc/ifcvt.c
|
||||
@@ -81,7 +81,7 @@
|
||||
@@ -81,7 +81,7 @@ static int num_possible_if_blocks;
|
||||
static int num_updated_if_blocks;
|
||||
|
||||
/* # of changes made. */
|
||||
@ -22061,7 +22061,7 @@
|
||||
|
||||
/* Whether conditional execution changes were made. */
|
||||
static int cond_exec_changed_p;
|
||||
@@ -286,6 +286,9 @@
|
||||
@@ -286,6 +286,9 @@ cond_exec_process_insns (ce_if_block_t *
|
||||
if (must_be_last)
|
||||
return FALSE;
|
||||
|
||||
@ -22071,7 +22071,7 @@
|
||||
if (modified_in_p (test, insn))
|
||||
{
|
||||
if (!mod_ok)
|
||||
@@ -566,15 +569,18 @@
|
||||
@@ -566,15 +569,18 @@ cond_exec_process_if_block (ce_if_block_
|
||||
IFCVT_MODIFY_FINAL (ce_info);
|
||||
#endif
|
||||
|
||||
@ -22091,7 +22091,7 @@
|
||||
|
||||
fail:
|
||||
#ifdef IFCVT_MODIFY_CANCEL
|
||||
@@ -1080,7 +1086,11 @@
|
||||
@@ -1080,7 +1086,11 @@ noce_try_addcc (struct noce_if_info *if_
|
||||
!= UNKNOWN))
|
||||
{
|
||||
rtx cond = if_info->cond;
|
||||
@ -22104,7 +22104,7 @@
|
||||
|
||||
/* First try to use addcc pattern. */
|
||||
if (general_operand (XEXP (cond, 0), VOIDmode)
|
||||
@@ -3017,7 +3027,12 @@
|
||||
@@ -3017,7 +3027,12 @@ find_if_header (basic_block test_bb, int
|
||||
&& noce_find_if_block (test_bb, then_edge, else_edge, pass))
|
||||
goto success;
|
||||
|
||||
@ -22118,7 +22118,7 @@
|
||||
&& cond_exec_find_if_block (&ce_info))
|
||||
goto success;
|
||||
|
||||
@@ -3132,7 +3147,11 @@
|
||||
@@ -3132,7 +3147,11 @@ cond_exec_find_if_block (struct ce_if_bl
|
||||
|
||||
/* We only ever should get here after reload,
|
||||
and only if we have conditional execution. */
|
||||
@ -22130,7 +22130,7 @@
|
||||
|
||||
/* Discover if any fall through predecessors of the current test basic block
|
||||
were && tests (which jump to the else block) or || tests (which jump to
|
||||
@@ -4226,6 +4245,14 @@
|
||||
@@ -4226,6 +4245,14 @@ gate_handle_if_after_reload (void)
|
||||
static unsigned int
|
||||
rest_of_handle_if_after_reload (void)
|
||||
{
|
||||
@ -22147,7 +22147,7 @@
|
||||
}
|
||||
--- a/gcc/longlong.h
|
||||
+++ b/gcc/longlong.h
|
||||
@@ -239,6 +239,41 @@
|
||||
@@ -239,6 +239,41 @@ UDItype __umulsidi3 (USItype, USItype);
|
||||
#define UDIV_TIME 100
|
||||
#endif /* __arm__ */
|
||||
|
||||
@ -22191,7 +22191,7 @@
|
||||
#if __CRIS_arch_version >= 8
|
||||
--- a/gcc/optabs.h
|
||||
+++ b/gcc/optabs.h
|
||||
@@ -586,7 +586,7 @@
|
||||
@@ -586,7 +586,7 @@ extern enum insn_code reload_out_optab[N
|
||||
extern optab code_to_optab[NUM_RTX_CODE + 1];
|
||||
|
||||
|
||||
@ -22202,7 +22202,7 @@
|
||||
gives the gen_function to make a branch to test that condition. */
|
||||
--- a/gcc/sched-deps.c
|
||||
+++ b/gcc/sched-deps.c
|
||||
@@ -1406,7 +1406,14 @@
|
||||
@@ -1406,7 +1406,14 @@ fixup_sched_groups (rtx insn)
|
||||
|
||||
prev_nonnote = prev_nonnote_insn (insn);
|
||||
if (BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (prev_nonnote)
|
||||
@ -22218,7 +22218,7 @@
|
||||
add_dependence (insn, prev_nonnote, REG_DEP_ANTI);
|
||||
}
|
||||
|
||||
@@ -1905,8 +1912,29 @@
|
||||
@@ -1905,8 +1912,29 @@ sched_analyze_insn (struct deps *deps, r
|
||||
|
||||
if (code == COND_EXEC)
|
||||
{
|
||||
@ -22272,7 +22272,7 @@
|
||||
/* { dg-options "-O2 -foptimize-sibling-calls" } */
|
||||
--- a/gcc/testsuite/gcc.dg/trampoline-1.c
|
||||
+++ b/gcc/testsuite/gcc.dg/trampoline-1.c
|
||||
@@ -46,6 +46,8 @@
|
||||
@@ -46,6 +46,8 @@ void foo (void)
|
||||
|
||||
int main (void)
|
||||
{
|
||||
@ -22294,7 +22294,7 @@
|
||||
// different sentry variables for construction and destruction.
|
||||
--- a/libgcc/config.host
|
||||
+++ b/libgcc/config.host
|
||||
@@ -240,6 +240,8 @@
|
||||
@@ -240,6 +240,8 @@ arm-*-pe*)
|
||||
;;
|
||||
arm*-*-kaos*)
|
||||
;;
|
||||
@ -22314,7 +22314,7 @@
|
||||
|
||||
/** @file ctype_base.h
|
||||
* This is an internal header file, included by other library headers.
|
||||
@@ -45,7 +47,11 @@
|
||||
@@ -45,7 +47,11 @@ _GLIBCXX_BEGIN_NAMESPACE(std)
|
||||
struct ctype_base
|
||||
{
|
||||
// Non-standard typedefs.
|
||||
@ -22328,7 +22328,7 @@
|
||||
// on the mask type. Because of this, we don't use an enum.
|
||||
--- a/libstdc++-v3/include/Makefile.in
|
||||
+++ b/libstdc++-v3/include/Makefile.in
|
||||
@@ -36,6 +36,7 @@
|
||||
@@ -36,6 +36,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
@ -22338,7 +22338,7 @@
|
||||
subdir = include
|
||||
--- a/libstdc++-v3/libmath/Makefile.in
|
||||
+++ b/libstdc++-v3/libmath/Makefile.in
|
||||
@@ -37,6 +37,7 @@
|
||||
@@ -37,6 +37,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
@ -22348,7 +22348,7 @@
|
||||
ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
|
||||
--- a/libstdc++-v3/libsupc++/Makefile.in
|
||||
+++ b/libstdc++-v3/libsupc++/Makefile.in
|
||||
@@ -38,6 +38,7 @@
|
||||
@@ -38,6 +38,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
@ -22358,7 +22358,7 @@
|
||||
subdir = libsupc++
|
||||
--- a/libstdc++-v3/Makefile.in
|
||||
+++ b/libstdc++-v3/Makefile.in
|
||||
@@ -36,6 +36,7 @@
|
||||
@@ -36,6 +36,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
@ -22368,7 +22368,7 @@
|
||||
$(srcdir)/Makefile.am $(top_srcdir)/configure \
|
||||
--- a/libstdc++-v3/po/Makefile.in
|
||||
+++ b/libstdc++-v3/po/Makefile.in
|
||||
@@ -36,6 +36,7 @@
|
||||
@@ -36,6 +36,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
@ -22378,7 +22378,7 @@
|
||||
subdir = po
|
||||
--- a/libstdc++-v3/src/Makefile.in
|
||||
+++ b/libstdc++-v3/src/Makefile.in
|
||||
@@ -37,6 +37,7 @@
|
||||
@@ -37,6 +37,7 @@ POST_UNINSTALL = :
|
||||
build_triplet = @build@
|
||||
host_triplet = @host@
|
||||
target_triplet = @target@
|
||||
|
@ -1,9 +1,7 @@
|
||||
see gcc PR34205
|
||||
Index: gcc-4.3.0/gcc/tree.h
|
||||
===================================================================
|
||||
--- gcc-4.3.0/gcc/tree.h (revision 130511)
|
||||
+++ gcc-4.3.0/gcc/tree.h (working copy)
|
||||
@@ -39,6 +39,7 @@
|
||||
--- a/gcc/tree.h
|
||||
+++ b/gcc/tree.h
|
||||
@@ -39,6 +39,7 @@ enum tree_code {
|
||||
|
||||
LAST_AND_UNUSED_TREE_CODE /* A convenient way to get a value for
|
||||
NUM_TREE_CODES. */
|
||||
@ -11,11 +9,9 @@ Index: gcc-4.3.0/gcc/tree.h
|
||||
};
|
||||
|
||||
#undef DEFTREECODE
|
||||
Index: gcc-4.3.0/gcc/rtl.h
|
||||
===================================================================
|
||||
--- gcc-4.3.0/gcc/rtl.h (revision 130511)
|
||||
+++ gcc-4.3.0/gcc/rtl.h (working copy)
|
||||
@@ -48,9 +48,11 @@
|
||||
--- a/gcc/rtl.h
|
||||
+++ b/gcc/rtl.h
|
||||
@@ -48,9 +48,11 @@ enum rtx_code {
|
||||
#include "rtl.def" /* rtl expressions are documented here */
|
||||
#undef DEF_RTL_EXPR
|
||||
|
||||
@ -28,11 +24,9 @@ Index: gcc-4.3.0/gcc/rtl.h
|
||||
|
||||
#define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE)
|
||||
/* The cast here, saves many elsewhere. */
|
||||
Index: gcc-4.3.0/gcc/c-common.h
|
||||
===================================================================
|
||||
--- gcc-4.3.0/gcc/c-common.h (revision 130511)
|
||||
+++ gcc-4.3.0/gcc/c-common.h (working copy)
|
||||
@@ -125,6 +125,7 @@
|
||||
--- a/gcc/c-common.h
|
||||
+++ b/gcc/c-common.h
|
||||
@@ -125,6 +125,7 @@ enum rid
|
||||
RID_LAST_AT = RID_AT_IMPLEMENTATION,
|
||||
RID_FIRST_PQ = RID_IN,
|
||||
RID_LAST_PQ = RID_ONEWAY
|
||||
|
Loading…
Reference in New Issue
Block a user