rb532: remove 2.6.32 support
SVN-Revision: 31594
This commit is contained in:
parent
63a532a472
commit
787b253859
@ -1,180 +0,0 @@
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CONFIG_32BIT=y
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# CONFIG_64BIT is not set
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# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
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# CONFIG_AR7 is not set
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# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_POPULATES_NODE_MAP=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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# CONFIG_ARCH_SUPPORTS_MSI is not set
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CONFIG_ARCH_SUPPORTS_OPROFILE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ATA=y
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# CONFIG_BCM47XX is not set
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# CONFIG_BCM63XX is not set
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CONFIG_BITREVERSE=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_BOOT_RAW=y
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# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
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# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CEVT_R4K_LIB=y
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CONFIG_CFG80211_DEFAULT_PS_VALUE=0
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# CONFIG_CPU_BIG_ENDIAN is not set
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# CONFIG_CPU_CAVIUM_OCTEON is not set
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_LITTLE_ENDIAN=y
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# CONFIG_CPU_LOONGSON2E is not set
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CONFIG_CPU_MIPS32=y
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CONFIG_CPU_MIPS32_R1=y
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# CONFIG_CPU_MIPS32_R2 is not set
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# CONFIG_CPU_MIPS64_R1 is not set
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# CONFIG_CPU_MIPS64_R2 is not set
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CONFIG_CPU_MIPSR1=y
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# CONFIG_CPU_NEVADA is not set
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# CONFIG_CPU_R10000 is not set
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# CONFIG_CPU_R3000 is not set
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# CONFIG_CPU_R4300 is not set
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# CONFIG_CPU_R4X00 is not set
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# CONFIG_CPU_R5000 is not set
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# CONFIG_CPU_R5432 is not set
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# CONFIG_CPU_R5500 is not set
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# CONFIG_CPU_R6000 is not set
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# CONFIG_CPU_R8000 is not set
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# CONFIG_CPU_RM7000 is not set
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# CONFIG_CPU_RM9000 is not set
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# CONFIG_CPU_SB1 is not set
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CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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# CONFIG_CPU_TX39XX is not set
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# CONFIG_CPU_TX49XX is not set
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# CONFIG_CPU_VR41XX is not set
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CONFIG_CSRC_R4K=y
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CONFIG_CSRC_R4K_LIB=y
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CONFIG_DECOMPRESS_LZMA=y
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CONFIG_DEVPORT=y
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# CONFIG_DM9000 is not set
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CONFIG_DMA_NEED_PCI_MAP_STATE=y
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CONFIG_DMA_NONCOHERENT=y
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# CONFIG_ENABLE_WARN_DEPRECATED is not set
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CONFIG_EXT4_FS=y
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# CONFIG_FSNOTIFY is not set
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_FIND_LAST_BIT=y
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CONFIG_GENERIC_FIND_NEXT_BIT=y
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CONFIG_GENERIC_GPIO=y
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CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_HAMRADIO is not set
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_OPROFILE=y
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# CONFIG_HIGH_RES_TIMERS is not set
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_HZ=250
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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CONFIG_IMAGE_CMDLINE_HACK=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IRQ_CPU=y
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CONFIG_KEXEC=y
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CONFIG_KORINA=y
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# CONFIG_LEDS_GPIO is not set
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CONFIG_LEDS_MIKROTIK_RB532=y
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# CONFIG_MACH_ALCHEMY is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MACH_LOONGSON is not set
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# CONFIG_MACH_TX39XX is not set
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# CONFIG_MACH_TX49XX is not set
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# CONFIG_MACH_VR41XX is not set
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CONFIG_MIKROTIK_RB532=y
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CONFIG_MIPS=y
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# CONFIG_MIPS_COBALT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=4
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# CONFIG_MIPS_MACHINE is not set
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# CONFIG_MIPS_MALTA is not set
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CONFIG_MIPS_MT_DISABLED=y
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# CONFIG_MIPS_MT_SMP is not set
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# CONFIG_MIPS_MT_SMTC is not set
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# CONFIG_MIPS_SIM is not set
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CONFIG_MTD_BLOCK2MTD=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_AMDSTD is not set
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CONFIG_MTD_CFI_GEOMETRY=y
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# CONFIG_MTD_CFI_INTELEXT is not set
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# CONFIG_MTD_COMPLEX_MAPPINGS is not set
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_MTD_NAND_VERIFY_WRITE=y
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CONFIG_MTD_PHYSMAP=y
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# CONFIG_MTD_ROOTFS_ROOT_DEV is not set
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# CONFIG_MTD_ROOTFS_SPLIT is not set
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CONFIG_NF_CONNTRACK=y
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CONFIG_NF_CT_ACCT=y
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# CONFIG_NO_IOPORT is not set
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# CONFIG_NXP_STB220 is not set
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# CONFIG_NXP_STB225 is not set
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CONFIG_PAGEFLAGS_EXTENDED=y
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CONFIG_PATA_RB532=y
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CONFIG_PCI=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCSPKR_PLATFORM=y
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# CONFIG_PMC_MSP is not set
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# CONFIG_PMC_YOSEMITE is not set
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# CONFIG_PNX8550_JBS is not set
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# CONFIG_PNX8550_STB810 is not set
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CONFIG_RC32434_WDT=y
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CONFIG_SCHED_OMIT_FRAME_POINTER=y
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CONFIG_SCSI=y
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# CONFIG_SCSI_LOWLEVEL is not set
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# CONFIG_SCSI_MULTI_LUN is not set
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# CONFIG_SCSI_PROC_FS is not set
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# CONFIG_SERIAL_8250_EXTENDED is not set
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# CONFIG_SGI_IP22 is not set
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# CONFIG_SGI_IP27 is not set
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# CONFIG_SGI_IP28 is not set
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# CONFIG_SGI_IP32 is not set
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# CONFIG_SIBYTE_BIGSUR is not set
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# CONFIG_SIBYTE_CARMEL is not set
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# CONFIG_SIBYTE_CRHINE is not set
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# CONFIG_SIBYTE_CRHONE is not set
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# CONFIG_SIBYTE_LITTLESUR is not set
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# CONFIG_SIBYTE_RHONE is not set
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# CONFIG_SIBYTE_SENTOSA is not set
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# CONFIG_SIBYTE_SWARM is not set
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# CONFIG_SWAP is not set
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CONFIG_SWAP_IO_SPACE=y
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CONFIG_SYS_HAS_CPU_MIPS32_R1=y
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CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
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# CONFIG_TC35815 is not set
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CONFIG_TRAD_SIGNALS=y
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# CONFIG_TREE_PREEMPT_RCU is not set
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CONFIG_TREE_RCU=y
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CONFIG_VIA_RHINE=y
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CONFIG_VIA_RHINE_MMIO=y
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CONFIG_YAFFS_9BYTE_TAGS=y
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# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
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CONFIG_YAFFS_AUTO_YAFFS2=y
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# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
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# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
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CONFIG_YAFFS_FS=y
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CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
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CONFIG_YAFFS_YAFFS1=y
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CONFIG_YAFFS_YAFFS2=y
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CONFIG_ZONE_DMA_FLAG=0
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@ -1,20 +0,0 @@
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--- a/arch/mips/rb532/prom.c
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+++ b/arch/mips/rb532/prom.c
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@@ -67,6 +67,7 @@ static inline unsigned long tag2ul(char
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return simple_strtoul(num, 0, 10);
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}
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+extern char __image_cmdline[];
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void __init prom_setup_cmdline(void)
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{
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static char cmd_line[CL_SIZE] __initdata;
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@@ -109,6 +110,9 @@ void __init prom_setup_cmdline(void)
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}
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*(cp++) = ' ';
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+ strcpy(cp,(__image_cmdline));
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+ cp += strlen(__image_cmdline);
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+
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i = strlen(arcs_cmdline);
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if (i > 0) {
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*(cp++) = ' ';
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@ -1,48 +0,0 @@
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--- a/arch/mips/rb532/devices.c
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+++ b/arch/mips/rb532/devices.c
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@@ -139,6 +139,19 @@ static struct platform_device cf_slot0 =
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};
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/* Resources and device for NAND */
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+
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+/*
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+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
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+ * will not be able to find the kernel that we load. So set the oobinfo
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+ * when creating the partitions
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+ */
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+static struct nand_ecclayout rb532_nand_ecclayout = {
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+ .eccbytes = 6,
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+ .eccpos = { 8, 9, 10, 13, 14, 15 },
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+ .oobavail = 9,
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+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
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+};
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+
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static int rb532_dev_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(GPIO_RDY);
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@@ -280,6 +293,16 @@ static void __init parse_mac_addr(char *
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/* NAND definitions */
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#define NAND_CHIP_DELAY 25
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+static int rb532_nand_fixup(struct mtd_info *mtd)
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+{
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+ struct nand_chip *chip = mtd->priv;
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+
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+ if (mtd->writesize == 512)
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+ chip->ecc.layout = &rb532_nand_ecclayout;
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+
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+ return 0;
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+}
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+
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static void __init rb532_nand_setup(void)
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{
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switch (mips_machtype) {
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@@ -299,6 +322,8 @@ static void __init rb532_nand_setup(void
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rb532_nand_data.chip.partitions = rb532_partition_info;
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rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
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rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
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+
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+ rb532_nand_data.chip.chip_fixup = &rb532_nand_fixup;
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}
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@ -1,11 +0,0 @@
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--- a/arch/mips/rb532/prom.c
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+++ b/arch/mips/rb532/prom.c
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@@ -73,7 +73,7 @@ void __init prom_setup_cmdline(void)
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static char cmd_line[CL_SIZE] __initdata;
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char *cp, *board;
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int prom_argc;
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- char **prom_argv, **prom_envp;
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+ char **prom_argv, **prom_envp __maybe_unused;
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int i;
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prom_argc = fw_arg0;
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