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ramips: ethernet: ralink: use the reset controller api for esw & ephy

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Instead of writing direct into the reset registers.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
This commit is contained in:
Alexander Couzens 2021-06-09 23:35:54 +02:00
parent 3fa01db479
commit 694561ae60
5 changed files with 45 additions and 15 deletions
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4
target/linux/ramips/dts/mt7628an.dtsi
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@ -439,8 +439,8 @@
compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw"; compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>; reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>; resets = <&rstctrl 23 &rstctrl 24>;
reset-names = "esw"; reset-names = "esw", "ephy";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <17>; interrupts = <17>;

4
target/linux/ramips/dts/rt3050.dtsi
View File

@ -319,8 +319,8 @@
compatible = "ralink,rt3050-esw"; compatible = "ralink,rt3050-esw";
reg = <0x10110000 0x8000>; reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>; resets = <&rstctrl 23 &rstctrl 24>;
reset-names = "esw"; reset-names = "esw", "ephy";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <17>; interrupts = <17>;

4
target/linux/ramips/dts/rt3352.dtsi
View File

@ -331,8 +331,8 @@
compatible = "ralink,rt3352-esw", "ralink,rt3050-esw"; compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>; reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>; resets = <&rstctrl 23 &rstctrl 24>;
reset-names = "esw"; reset-names = "esw", "ephy";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <17>; interrupts = <17>;

4
target/linux/ramips/dts/rt5350.dtsi
View File

@ -356,8 +356,8 @@
compatible = "ralink,rt5350-esw", "ralink,rt3050-esw"; compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>; reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>; resets = <&rstctrl 23 &rstctrl 24>;
reset-names = "esw"; reset-names = "esw", "ephy";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <17>; interrupts = <17>;

44
target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
View File

@ -17,9 +17,11 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <asm/mach-ralink/ralink_regs.h> #include <asm/mach-ralink/ralink_regs.h>
#include <linux/of_device.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/switch.h> #include <linux/switch.h>
#include <linux/reset.h>
#include "mtk_eth_soc.h" #include "mtk_eth_soc.h"
@ -172,7 +174,6 @@
#define RT5350_ESW_REG_PXTPC(_x) (0x150 + (4 * _x)) #define RT5350_ESW_REG_PXTPC(_x) (0x150 + (4 * _x))
#define RT5350_EWS_REG_LED_POLARITY 0x168 #define RT5350_EWS_REG_LED_POLARITY 0x168
#define RT5350_RESET_EPHY BIT(24)
enum { enum {
/* Global attributes. */ /* Global attributes. */
@ -232,6 +233,8 @@ struct rt305x_esw {
int led_frequency; int led_frequency;
struct esw_vlan vlans[RT305X_ESW_NUM_VLANS]; struct esw_vlan vlans[RT305X_ESW_NUM_VLANS];
struct esw_port ports[RT305X_ESW_NUM_PORTS]; struct esw_port ports[RT305X_ESW_NUM_PORTS];
struct reset_control *rst_esw;
struct reset_control *rst_ephy;
}; };
@ -254,6 +257,29 @@ static inline void esw_rmw_raw(struct rt305x_esw *esw, unsigned reg,
__raw_writel(t | val, esw->base + reg); __raw_writel(t | val, esw->base + reg);
} }
static void esw_reset(struct rt305x_esw *esw)
{
if (!esw->rst_esw)
return;
reset_control_assert(esw->rst_esw);
usleep_range(60, 120);
reset_control_deassert(esw->rst_esw);
/* the esw takes long to reset otherwise the board hang */
msleep(10);
}
static void esw_reset_ephy(struct rt305x_esw *esw)
{
if (!esw->rst_ephy)
return;
reset_control_assert(esw->rst_ephy);
usleep_range(60, 120);
reset_control_deassert(esw->rst_ephy);
usleep_range(60, 120);
}
static void esw_rmw(struct rt305x_esw *esw, unsigned reg, static void esw_rmw(struct rt305x_esw *esw, unsigned reg,
unsigned long mask, unsigned long val) unsigned long mask, unsigned long val)
{ {
@ -505,8 +531,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
esw->ports[i].disable = (port_disable & (1 << i)) != 0; esw->ports[i].disable = (port_disable & (1 << i)) != 0;
if (ralink_soc == RT305X_SOC_RT3352) { if (ralink_soc == RT305X_SOC_RT3352) {
/* reset EPHY */ esw_reset_ephy(esw);
fe_reset(RT5350_RESET_EPHY);
rt305x_mii_write(esw, 0, 31, 0x8000); rt305x_mii_write(esw, 0, 31, 0x8000);
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
@ -556,8 +581,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
/* select local register */ /* select local register */
rt305x_mii_write(esw, 0, 31, 0x8000); rt305x_mii_write(esw, 0, 31, 0x8000);
} else if (ralink_soc == RT305X_SOC_RT5350) { } else if (ralink_soc == RT305X_SOC_RT5350) {
/* reset EPHY */ esw_reset_ephy(esw);
fe_reset(RT5350_RESET_EPHY);
/* set the led polarity */ /* set the led polarity */
esw_w32(esw, esw->reg_led_polarity & 0x1F, esw_w32(esw, esw->reg_led_polarity & 0x1F,
@ -614,8 +638,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
} else if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688) { } else if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688) {
int i; int i;
/* reset EPHY */ esw_reset_ephy(esw);
fe_reset(RT5350_RESET_EPHY);
/* set the led polarity */ /* set the led polarity */
esw_w32(esw, esw->reg_led_polarity & 0x1F, esw_w32(esw, esw->reg_led_polarity & 0x1F,
@ -1385,6 +1408,13 @@ static int esw_probe(struct platform_device *pdev)
if (reg_init) if (reg_init)
esw->reg_led_polarity = be32_to_cpu(*reg_init); esw->reg_led_polarity = be32_to_cpu(*reg_init);
esw->rst_esw = devm_reset_control_get(&pdev->dev, "esw");
if (IS_ERR(esw->rst_esw))
esw->rst_esw = NULL;
esw->rst_ephy = devm_reset_control_get(&pdev->dev, "ephy");
if (IS_ERR(esw->rst_ephy))
esw->rst_ephy = NULL;
swdev = &esw->swdev; swdev = &esw->swdev;
swdev->of_node = pdev->dev.of_node; swdev->of_node = pdev->dev.of_node;
swdev->name = "rt305x-esw"; swdev->name = "rt305x-esw";