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fix wrong logic in MDIO code and second PHY address

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SVN-Revision: 15034
This commit is contained in:
Florian Fainelli 2009-03-25 09:15:30 +00:00
parent 25cf1bc5e4
commit 47a268b30a
1 changed files with 3 additions and 3 deletions
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6
target/linux/rdc/files/drivers/net/r6040.c
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@ -91,7 +91,7 @@ MODULE_PARM_DESC(debug, "debug mask (-1 for all)");
/* PHY CHIP Address */
#define PHY1_ADDR 1 /* For MAC1 */
#define PHY2_ADDR 2 /* For MAC2 */
#define PHY2_ADDR 3 /* For MAC2 */
#define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
#define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
@ -305,7 +305,7 @@ STATIC int phy_read(void __iomem *ioaddr, int phy_addr, int reg)
/* Wait for the read bit to be cleared */
while (limit--) {
cmd = ioread16(ioaddr + MMDIO);
if (cmd & MDIO_READ)
if (!(cmd & MDIO_READ))
break;
}
@ -333,7 +333,7 @@ STATIC void phy_write(void __iomem *ioaddr, int phy_addr, int reg, u16 val)
/* Wait for the write bit to be cleared */
while (limit--) {
cmd = ioread16(ioaddr + MMDIO);
if (cmd & MDIO_WRITE)
if (!(cmd & MDIO_WRITE))
break;
}
if (limit <= 0)