Preserve fw_arg0-3 to allow runtime bootloader detection (Gabor Juhos)

SVN-Revision: 6711
This commit is contained in:
Florian Fainelli 2007-03-26 07:32:10 +00:00
parent 6c9b120593
commit 4377351db4
2 changed files with 37 additions and 18 deletions

View File

@ -30,6 +30,9 @@
* 24-Apr-2005 Oleg I. Vdovikin
* reordered functions using lds script, removed forward decl
*
* 24-Mar-2007 Gabor Juhos
* pass original values of the a0,a1,a2,a3 registers to the kernel
*
*/
#include "LzmaDecode.h"
@ -93,6 +96,9 @@ extern unsigned char workspace[];
unsigned int offset;
unsigned char *data;
typedef void (*kernel_entry)(unsigned long reg_a0, unsigned long reg_a1,
unsigned long reg_a2, unsigned long reg_a3);
/* flash access should be aligned, so wrapper is used */
/* read byte from the flash, all accesses are 32-bit aligned */
static int read_byte(void *object, unsigned char **buffer, UInt32 *bufferSize)
@ -119,7 +125,9 @@ static __inline__ unsigned char get_byte(void)
}
/* should be the first function */
void entry(unsigned long icache_size, unsigned long icache_lsize,
void entry(unsigned long reg_a0, unsigned long reg_a1,
unsigned long reg_a2, unsigned long reg_a3,
unsigned long icache_size, unsigned long icache_lsize,
unsigned long dcache_size, unsigned long dcache_lsize)
{
unsigned int i; /* temp value */
@ -173,7 +181,7 @@ void entry(unsigned long icache_size, unsigned long icache_lsize,
/* Jump to load address */
uart_write_str("ok\r\n");
((void (*)(void)) LOADADDR)();
((kernel_entry) LOADADDR)(reg_a0, reg_a1, reg_a2, reg_a3);
}
uart_write_str("failed\r\n");
while (1 );

View File

@ -1,3 +1,6 @@
/* Copyright 2007 Gabor Juhos */
/* keep original values of the a0,a1,a2,a3 registers */
/* cache manipulation adapted from Broadcom code */
/* Copyright 2005 Oleg I. Vdovikin (oleg@cs.msu.su) */
/* cache manipulation adapted from Broadcom code */
/* idea taken from original bunzip2 decompressor code */
@ -40,18 +43,17 @@
.set noreorder
/* Copy decompressor code to the right place */
li t2, BZ_TEXT_START
add a0, t2, 0
la a1, code_start
la a2, code_stop
li t0, BZ_TEXT_START
la t1, code_start
la t2, code_stop
$L1:
lw t0, 0(a1)
sw t0, 0(a0)
add a1, 4
add a0, 4
blt a1, a2, $L1
nop
lw t3, 0(t1)
sw t3, 0(t0)
add t1, 4
blt t1, t2, $L1
add t0, 4
/* At this point we need to invalidate dcache and */
/* icache before jumping to new code */
@ -145,11 +147,20 @@ nodc:
addu t0,s3
noic:
move a0,s3 /* icache line size */
move a1,s4 /* icache size */
move a2,s1 /* dcache line size */
jal t2
move a3,s2 /* dcache size */
li t0, BZ_TEXT_START
addiu sp, -32 /* reserve stack for parameters */
#if 0
sw a0, 0(sp)
sw a1, 4(sp)
sw a2, 8(sp)
sw a3, 12(sp)
#endif
sw s3, 16(sp) /* icache line size */
sw s4, 20(sp) /* icache size */
sw s1, 24(sp) /* dcache line size */
jr t0
sw s2, 28(sp) /* dcache size */
.set reorder
END(startup)