toolchain/gcc: merge pending fix for miscompiled MIPS16 code issue (GCC PR 84790)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch
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toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch
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@ -0,0 +1,20 @@
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Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
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MIPS16 functions have a static assembler prologue which clobbers
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registers v0 and v1. Add these register clobbers to function call
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instructions.
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--- a/gcc/config/mips/mips.c
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+++ b/gcc/config/mips/mips.c
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@@ -3098,6 +3098,12 @@ mips_emit_call_insn (rtx pattern, rtx or
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emit_insn (gen_update_got_version ());
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}
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+ if (TARGET_MIPS16 && TARGET_USE_GOT)
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+ {
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+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
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+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
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+ }
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+
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if (TARGET_MIPS16
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&& TARGET_EXPLICIT_RELOCS
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&& TARGET_CALL_CLOBBERED_GP)
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@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
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--- a/gcc/config/mips/mips.c
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+++ b/gcc/config/mips/mips.c
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@@ -19784,7 +19784,7 @@ mips_option_override (void)
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@@ -19790,7 +19790,7 @@ mips_option_override (void)
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flag_pcc_struct_return = 0;
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/* Decide which rtx_costs structure to use. */
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@ -48,7 +48,7 @@ sellcey@mips.com
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--- a/gcc/config/mips/mips.c
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+++ b/gcc/config/mips/mips.c
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@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t
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@@ -22567,6 +22567,9 @@ mips_promote_function_mode (const_tree t
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#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
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#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2
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