lantiq: cleanup code ar9-vr9 parts
- remove unused code within 500-ar9_vr9.patch - fixed return of IFX_ERROR (solves SIGSEGV in asterisk at failure) - align it a bit with 400-falcon.patch - remove 600-kernel-4.9.patch since changed parts are removed during cleanup Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
This commit is contained in:
parent
9ac4c1dcee
commit
001a50d314
@ -25,25 +25,43 @@
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/* ============================= */
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/* Local Macros & Definitions */
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/* ============================= */
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@@ -98,47 +107,48 @@ IFX_int32_t (*ifx_wdog_callback) (IFX_ui
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*/
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IFX_int32_t ifx_mps_fw_wdog_start_ar9()
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{
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+ return IFX_SUCCESS; /* FIXME - Disable start wdog... */
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/* vpe1_wdog_ctr should be set up in u-boot as
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"vpe1_wdog_ctr_addr=0xBF2001B0"; protection from incorrect or missing
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setting */
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@@ -65,12 +74,7 @@ extern mps_comm_dev *pMPSDev;
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IFX_void_t ifx_mps_release (IFX_void_t);
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extern IFX_uint32_t ifx_mps_reset_structures (mps_comm_dev * pMPSDev);
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extern IFX_int32_t ifx_mps_bufman_close (IFX_void_t);
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-IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count);
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extern IFXOS_event_t fw_ready_evt;
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-/* ============================= */
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-/* Local function declaration */
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-/* ============================= */
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-static IFX_int32_t ifx_mps_fw_wdog_start_ar9(IFX_void_t);
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/* ============================= */
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/* Local variable definition */
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@@ -88,61 +92,6 @@ IFX_int32_t (*ifx_wdog_callback) (IFX_ui
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******************************************************************************/
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/**
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- * Start AR9 EDSP firmware watchdog mechanism.
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- * Called after download and startup of VPE1.
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- *
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- * \param none
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- * \return 0 IFX_SUCCESS
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- * \return -1 IFX_ERROR
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- * \ingroup Internal
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- */
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-IFX_int32_t ifx_mps_fw_wdog_start_ar9()
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-{
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- /* vpe1_wdog_ctr should be set up in u-boot as
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- "vpe1_wdog_ctr_addr=0xBF2001B0"; protection from incorrect or missing
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- setting */
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- if (vpe1_wdog_ctr != VPE1_WDOG_CTR_ADDR)
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- {
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- vpe1_wdog_ctr = VPE1_WDOG_CTR_ADDR;
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- }
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+// if (vpe1_wdog_ctr != VPE1_WDOG_CTR_ADDR)
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+// {
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+// vpe1_wdog_ctr = VPE1_WDOG_CTR_ADDR;
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+// }
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/* vpe1_wdog_timeout should be set up in u-boot as "vpe1_wdog_timeout =
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<value in ms>"; protection from insane setting */
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-
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- /* vpe1_wdog_timeout should be set up in u-boot as "vpe1_wdog_timeout =
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- <value in ms>"; protection from insane setting */
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- if (vpe1_wdog_timeout < VPE1_WDOG_TMOUT_MIN)
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- {
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- vpe1_wdog_timeout = VPE1_WDOG_TMOUT_MIN;
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@ -52,20 +70,11 @@
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- {
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- vpe1_wdog_timeout = VPE1_WDOG_TMOUT_MAX;
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- }
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+// if (vpe1_wdog_timeout < VPE1_WDOG_TMOUT_MIN)
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+// {
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+// vpe1_wdog_timeout = VPE1_WDOG_TMOUT_MIN;
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+// }
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+// if (vpe1_wdog_timeout > VPE1_WDOG_TMOUT_MAX)
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+// {
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+// vpe1_wdog_timeout = VPE1_WDOG_TMOUT_MAX;
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+// }
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/* recalculate in jiffies */
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-
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- /* recalculate in jiffies */
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- vpe1_wdog_timeout = vpe1_wdog_timeout * HZ / 1000;
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+// vpe1_wdog_timeout = vpe1_wdog_timeout * HZ / 1000;
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/* register BSP callback function */
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-
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- /* register BSP callback function */
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- if (IFX_SUCCESS !=
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- vpe1_sw_wdog_register_reset_handler (ifx_mps_wdog_callback))
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- {
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@ -74,16 +83,8 @@
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- __FILE__, __func__, __LINE__));
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- return IFX_ERROR;;
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- }
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+// if (IFX_SUCCESS !=
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+// vpe1_sw_wdog_register_reset_handler (ifx_mps_wdog_callback))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: Unable to register WDT callback.\r\n",
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+// __FILE__, __func__, __LINE__));
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+// return IFX_ERROR;;
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+// }
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/* start software watchdog timer */
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-
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- /* start software watchdog timer */
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- if (IFX_SUCCESS != vpe1_sw_wdog_start (0))
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- {
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- TRACE (MPS, DBG_LEVEL_HIGH,
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@ -92,18 +93,14 @@
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- __FILE__, __func__, __LINE__));
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- return IFX_ERROR;
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- }
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+// if (IFX_SUCCESS != vpe1_sw_wdog_start (0))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR
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+// "[%s %s %d]: Error starting software watchdog timer.\r\n",
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+// __FILE__, __func__, __LINE__));
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+// return IFX_ERROR;
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+// }
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return IFX_SUCCESS;
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}
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@@ -292,6 +302,18 @@ IFX_int32_t ifx_mps_download_firmware (m
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- return IFX_SUCCESS;
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-}
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-
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-/**
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* Firmware download to Voice CPU
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* This function performs a firmware download to the coprocessor.
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*
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@@ -292,6 +241,18 @@ IFX_int32_t ifx_mps_download_firmware (m
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decryption. Subtract sizeof(u32) from length to avoid decryption
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of data beyond the FW image code */
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pFWDwnld->length -= sizeof(IFX_uint32_t);
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@ -122,40 +119,67 @@
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ifx_bsp_basic_mps_decrypt((IFX_uint32_t)cpu1_base_addr, pFWDwnld->length);
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}
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@@ -306,7 +328,7 @@ IFX_int32_t ifx_mps_download_firmware (m
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TRACE (MPS, DBG_LEVEL_HIGH,
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("MPS: FW checksum error: img=0x%08x calc=0x%08x\r\n",
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pFW_img_data->crc32, cksum));
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- return IFX_ERROR;
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+ /* return IFX_ERROR; -- FIXME */
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}
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}
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else
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@@ -362,9 +384,9 @@ IFX_void_t ifx_mps_shutdown (IFX_void_t)
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@@ -318,9 +279,6 @@ IFX_int32_t ifx_mps_download_firmware (m
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/* start VPE1 */
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ifx_mps_release ();
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- /* start FW watchdog mechanism */
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- ifx_mps_fw_wdog_start_ar9();
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-
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/* get FW version */
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return ifx_mps_get_fw_version (0);
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}
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@@ -345,8 +303,6 @@ IFX_int32_t ifx_mps_restart (IFX_void_t)
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ifx_mps_init_gpt ();
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/* let CPU1 run */
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ifx_mps_release ();
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- /* start FW watchdog mechanism */
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- ifx_mps_fw_wdog_start_ar9();
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TRACE (MPS, DBG_LEVEL_HIGH, ("IFX_MPS: Restarting firmware..."));
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return ifx_mps_get_fw_version (0);
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}
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@@ -361,10 +317,6 @@ IFX_void_t ifx_mps_shutdown (IFX_void_t)
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{
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if (vpe1_started)
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{
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/* stop software watchdog timer */
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- /* stop software watchdog timer */
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- vpe1_sw_wdog_stop (0);
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+// vpe1_sw_wdog_stop (0);
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/* clean up the BSP callback function */
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- /* clean up the BSP callback function */
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- vpe1_sw_wdog_register_reset_handler (IFX_NULL);
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+// vpe1_sw_wdog_register_reset_handler (IFX_NULL);
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/* stop VPE1 */
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vpe1_sw_stop (0);
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vpe1_started = 0;
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@@ -388,7 +410,7 @@ IFX_void_t ifx_mps_reset (IFX_void_t)
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@@ -387,8 +339,6 @@ IFX_void_t ifx_mps_reset (IFX_void_t)
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/* if VPE1 is already started, stop it */
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if (vpe1_started)
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{
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/* stop software watchdog timer first */
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- /* stop software watchdog timer first */
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- vpe1_sw_wdog_stop (0);
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+// vpe1_sw_wdog_stop (0);
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vpe1_sw_stop (0);
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vpe1_started = 0;
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}
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@@ -454,62 +476,62 @@ IFX_int32_t ifx_mps_wdog_callback (IFX_u
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#endif /* DEBUG */
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@@ -436,101 +386,6 @@ IFX_void_t ifx_mps_release (IFX_void_t)
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}
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/* reset SmartSLIC */
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/**
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- * WDT callback.
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- * This function is called by BSP (module softdog_vpe) in case if software
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- * watchdog timer expiration is detected by BSP.
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- * This function needs to be registered at BSP as WDT callback using
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- * vpe1_sw_wdog_register_reset_handler() API.
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- *
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- * \return 0 IFX_SUCCESS, cannot fail
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- * \ingroup Internal
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- */
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-IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count)
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-{
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- IFX_uint32_t flags;
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-#ifdef DEBUG
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- TRACE (MPS, DBG_LEVEL_HIGH,
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- ("MPS: watchdog callback! arg=0x%08x\r\n", wdog_cleared_ok_count));
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-#endif /* DEBUG */
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-
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- /* reset SmartSLIC */
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- IFXOS_LOCKINT (flags);
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- if (ifx_gpio_pin_reserve
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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@ -164,15 +188,7 @@
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- (KERN_ERR "[%s %s %d]: GPIO port/pin reservation error.\r\n",
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- __FILE__, __func__, __LINE__));
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- }
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+// IFXOS_LOCKINT (flags);
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+// if (ifx_gpio_pin_reserve
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO port/pin reservation error.\r\n",
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+// __FILE__, __func__, __LINE__));
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+// }
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/* P1_ALTSEL0.15 = 0 */
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- /* P1_ALTSEL0.15 = 0 */
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- if (ifx_gpio_altsel0_clear
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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- {
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@ -180,14 +196,7 @@
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- (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL0.\r\n", __FILE__,
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- __func__, __LINE__));
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- }
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+// if (ifx_gpio_altsel0_clear
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL0.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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/* P1_ALTSEL1.15 = 0 */
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- /* P1_ALTSEL1.15 = 0 */
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- if (ifx_gpio_altsel1_clear
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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- {
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@ -195,14 +204,7 @@
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- (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL1.\r\n", __FILE__,
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- __func__, __LINE__));
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- }
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+// if (ifx_gpio_altsel1_clear
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO error clearing ALTSEL1.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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/* P1_DIR.15 = 1 */
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- /* P1_DIR.15 = 1 */
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- if (ifx_gpio_dir_out_set
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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- {
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@ -210,14 +212,7 @@
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- (KERN_ERR "[%s %s %d]: GPIO error setting DIR.\r\n", __FILE__,
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- __func__, __LINE__));
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- }
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+// if (ifx_gpio_dir_out_set
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO error setting DIR.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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/* P1_OD.15 = 1 */
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- /* P1_OD.15 = 1 */
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- if (ifx_gpio_open_drain_set
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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- {
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@ -225,14 +220,7 @@
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- (KERN_ERR "[%s %s %d]: GPIO error setting OD.\r\n", __FILE__,
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- __func__, __LINE__));
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- }
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+// if (ifx_gpio_open_drain_set
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO error setting OD.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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/* P1_OUT.15 = 0 */
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- /* P1_OUT.15 = 0 */
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- if (ifx_gpio_output_clear
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- (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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- {
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@ -248,36 +236,44 @@
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- __func__, __LINE__));
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- }
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- IFXOS_UNLOCKINT (flags);
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+// if (ifx_gpio_output_clear
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO error clearing OUT.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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+// if (ifx_gpio_pin_free
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+// (IFX_GPIO_PIN_ID (SSLIC_RST_PORT, SSLIC_RST_PIN), IFX_MPS_MODULE_ID))
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+// {
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+// TRACE (MPS, DBG_LEVEL_HIGH,
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+// (KERN_ERR "[%s %s %d]: GPIO port/pin freeing error.\r\n", __FILE__,
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+// __func__, __LINE__));
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+// }
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+// IFXOS_UNLOCKINT (flags);
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/* recalculate and compare the firmware checksum */
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ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
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-
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- /* recalculate and compare the firmware checksum */
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- ifx_mps_fw_crc_compare(cpu1_base_addr, pFW_img_data);
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-
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- /* dump exception area on a console */
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- ifx_mps_dump_fw_xcpt(cpu1_base_addr, pFW_img_data);
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-
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- if (IFX_NULL != ifx_wdog_callback)
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- {
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- /* call VMMC driver */
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- ifx_wdog_callback (wdog_cleared_ok_count);
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- }
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- else
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- {
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- TRACE (MPS, DBG_LEVEL_HIGH,
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- (KERN_WARNING "MPS: VMMC watchdog timer callback is NULL.\r\n"));
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- }
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- return 0;
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-}
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-
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-/**
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* Register WDT callback.
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* This function is called by VMMC driver to register its callback in
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* the MPS driver.
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--- a/src/drv_vmmc_amazon_s.h
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+++ b/src/drv_vmmc_amazon_s.h
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@@ -16,7 +16,7 @@
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@@ -15,9 +15,7 @@
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*/
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#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
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-#if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
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-#include <asm/ifx/ifx_gpio.h>
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+//#include <asm/ifx/ifx_gpio.h>
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#else
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-#else
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+#if !defined(SYSTEM_AR9) && !defined(SYSTEM_VR9)
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#error no system selected
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#endif
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@@ -27,45 +27,6 @@
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@@ -27,45 +25,6 @@
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*/
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#define VMMC_PCM_IF_CFG_HOOK(mode, GPIOreserved, ret) \
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do { \
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@ -323,7 +319,7 @@
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} while(0);
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/**
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@@ -73,11 +34,6 @@ do { \
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@@ -73,11 +32,6 @@ do { \
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*/
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#define VMMC_DRIVER_UNLOAD_HOOK(ret) \
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do { \
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@ -1,20 +0,0 @@
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--- a/src/mps/drv_mps_vmmc_ar9.c
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+++ b/src/mps/drv_mps_vmmc_ar9.c
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@@ -74,7 +74,7 @@ extern mps_comm_dev *pMPSDev;
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IFX_void_t ifx_mps_release (IFX_void_t);
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extern IFX_uint32_t ifx_mps_reset_structures (mps_comm_dev * pMPSDev);
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extern IFX_int32_t ifx_mps_bufman_close (IFX_void_t);
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-IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count);
|
||||
+IFX_int32_t ifx_mps_wdog_callback (IFX_ulong_t wdog_cleared_ok_count);
|
||||
extern IFXOS_event_t fw_ready_evt;
|
||||
/* ============================= */
|
||||
/* Local function declaration */
|
||||
@@ -467,7 +467,7 @@ IFX_void_t ifx_mps_release (IFX_void_t)
|
||||
* \return 0 IFX_SUCCESS, cannot fail
|
||||
* \ingroup Internal
|
||||
*/
|
||||
-IFX_int32_t ifx_mps_wdog_callback (IFX_uint32_t wdog_cleared_ok_count)
|
||||
+IFX_int32_t ifx_mps_wdog_callback (IFX_ulong_t wdog_cleared_ok_count)
|
||||
{
|
||||
IFX_uint32_t flags;
|
||||
#ifdef DEBUG
|
Loading…
Reference in New Issue
Block a user