2008-06-05 17:10:39 +00:00
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--- a/drivers/net/sl351x_gmac.c
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+++ b/drivers/net/sl351x_gmac.c
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2008-04-27 17:03:01 +00:00
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@@ -68,9 +68,11 @@
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#include <linux/ip.h>
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#endif
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+/* Enables NAPI unconditionally */
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+#define CONFIG_SL_NAPI 1
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+
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// #define SL351x_TEST_WORKAROUND
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#ifdef CONFIG_SL351x_NAT
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-#define CONFIG_SL_NAPI 1
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#endif
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#define GMAX_TX_INTR_DISABLED 1
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#define DO_HW_CHKSUM 1
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2009-02-08 19:14:06 +00:00
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@@ -124,12 +126,17 @@ static char _debug_prefetch_buf[_DEBUG_P
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2008-04-27 17:03:01 +00:00
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*************************************************************/
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static int gmac_initialized = 0;
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TOE_INFO_T toe_private_data;
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-//static int do_again = 0;
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+static int do_again = 0;
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spinlock_t gmac_fq_lock;
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unsigned int FLAG_SWITCH;
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static unsigned int next_tick = 3 * HZ;
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-static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {{0x00,0x11,0x11,0x87,0x87,0x87}, {0x00,0x22,0x22,0xab,0xab,0xab}};
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+static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {
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+ {0x00,0x11,0x11,0x87,0x87,0x87},
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+#if GMAC_NUM != 1
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+ {0x00,0x22,0x22,0xab,0xab,0xab}
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+#endif
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+};
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#undef CONFIG_SL351x_RXTOE
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extern NAT_CFG_T nat_cfg;
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2009-02-08 19:14:06 +00:00
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@@ -2443,7 +2450,8 @@ static irqreturn_t toe_gmac_interrupt (i
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2008-04-27 17:03:01 +00:00
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toe = (TOE_INFO_T *)&toe_private_data;
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// handle NAPI
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#ifdef CONFIG_SL_NAPI
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-if (storlink_ctl.pauseoff == 1)
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+ /* XXX: check this, changed from 'storlink_ctl.pauseoff == 1' to if (1) */
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+if (1)
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{
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/* disable GMAC interrupt */
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//toe_gmac_disable_interrupt(tp->irq);
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2009-02-08 19:14:06 +00:00
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@@ -2530,7 +2538,7 @@ if (storlink_ctl.pauseoff == 1)
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2008-04-27 17:03:01 +00:00
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{
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if (likely(netif_rx_schedule_prep(dev)))
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{
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- unsigned int data32;
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+ // unsigned int data32;
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// disable GMAC-0 rx interrupt
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// class-Q & TOE-Q are implemented in future
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//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
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2009-02-08 19:14:06 +00:00
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@@ -2563,7 +2571,7 @@ if (storlink_ctl.pauseoff == 1)
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2008-04-27 17:03:01 +00:00
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{
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if (likely(netif_rx_schedule_prep(dev)))
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{
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- unsigned int data32;
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+ // unsigned int data32;
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// disable GMAC-0 rx interrupt
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// class-Q & TOE-Q are implemented in future
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//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
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2009-02-08 19:14:06 +00:00
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@@ -4217,7 +4225,7 @@ static int gmac_rx_poll(struct net_devic
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2008-04-27 17:03:01 +00:00
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GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
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unsigned int status4;
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volatile DMA_RWPTR_T fq_rwptr;
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- int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
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+ // int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
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//unsigned long rx_old_bytes;
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struct net_device_stats *isPtr = (struct net_device_stats *)&tp->ifStatics;
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//unsigned long long rx_time;
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2009-02-08 19:14:06 +00:00
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@@ -4479,7 +4487,7 @@ static int gmac_rx_poll(struct net_devic
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2008-04-27 17:03:01 +00:00
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if (rwptr.bits.rptr == rwptr.bits.wptr)
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{
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- unsigned int data32;
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+ // unsigned int data32;
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//printk("%s:---[rwptr.bits.rptr == rwptr.bits.wptr] rx_pkts_num=%d------rwptr.bits.rptr=0x%x------->Default_Q [rwptr.bits.rptr(SW)=0x%x, rwptr.bits.wptr(HW) = 0x%x ]---->Free_Q(SW_HW) = 0x%8x \n",__func__,rx_pkts_num,rwptr.bits.rptr,rwptr.bits.rptr,rwptr.bits.wptr,fq_rwptr.bits32 );
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/* Receive descriptor is empty now */
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