93 lines
2.6 KiB
Diff
93 lines
2.6 KiB
Diff
|
From 44e21f4c7c556573fff0432f7846086763df3455 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||
|
|
Date: Tue, 14 Jun 2011 21:14:39 +0200
|
||
|
|
Subject: [PATCH 44/79] MIPS: BCM63XX: add support for BCM6328 in bcm_enetsw
|
||
|
|
|
||
|
|
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||
|
|
---
|
||
|
|
arch/mips/bcm63xx/clk.c | 34 +++++++++++++++++++-------
|
||
|
|
arch/mips/bcm63xx/dev-enet.c | 4 +--
|
||
|
|
drivers/net/ethernet/broadcom/bcm63xx_enet.h | 2 +-
|
||
|
|
3 files changed, 28 insertions(+), 12 deletions(-)
|
||
|
|
|
||
|
|
--- a/arch/mips/bcm63xx/clk.c
|
||
|
|
+++ b/arch/mips/bcm63xx/clk.c
|
||
|
|
@@ -118,21 +118,37 @@ static struct clk clk_ephy = {
|
||
|
|
*/
|
||
|
|
static void enetsw_set(struct clk *clk, int enable)
|
||
|
|
{
|
||
|
|
- if (!BCMCPU_IS_6368())
|
||
|
|
+ u32 mask;
|
||
|
|
+
|
||
|
|
+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
|
||
|
|
return;
|
||
|
|
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
|
||
|
|
- CKCTL_6368_SWPKT_USB_EN |
|
||
|
|
- CKCTL_6368_SWPKT_SAR_EN, enable);
|
||
|
|
+
|
||
|
|
+ if (BCMCPU_IS_6328())
|
||
|
|
+ mask = CKCTL_6328_ROBOSW_EN;
|
||
|
|
+ else
|
||
|
|
+ mask = CKCTL_6368_ROBOSW_EN | CKCTL_6368_SWPKT_USB_EN |
|
||
|
|
+ CKCTL_6368_SWPKT_SAR_EN;
|
||
|
|
+
|
||
|
|
+ bcm_hwclock_set(mask, enable);
|
||
|
|
if (enable) {
|
||
|
|
+ u32 reg;
|
||
|
|
u32 val;
|
||
|
|
|
||
|
|
+ if (BCMCPU_IS_6328()) {
|
||
|
|
+ reg = PERF_SOFTRESET_6328_REG;
|
||
|
|
+ mask = SOFTRESET_6328_ENETSW_MASK;
|
||
|
|
+ } else {
|
||
|
|
+ reg = PERF_SOFTRESET_6368_REG;
|
||
|
|
+ mask = SOFTRESET_6368_ENETSW_MASK;
|
||
|
|
+ }
|
||
|
|
+
|
||
|
|
/* reset switch core afer clock change */
|
||
|
|
- val = bcm_perf_readl(PERF_SOFTRESET_6368_REG);
|
||
|
|
- val &= ~SOFTRESET_6368_ENETSW_MASK;
|
||
|
|
- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
|
||
|
|
+ val = bcm_perf_readl(reg);
|
||
|
|
+ val &= ~mask;
|
||
|
|
+ bcm_perf_writel(val, reg);
|
||
|
|
msleep(10);
|
||
|
|
- val |= SOFTRESET_6368_ENETSW_MASK;
|
||
|
|
- bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
|
||
|
|
+ val |= mask;
|
||
|
|
+ bcm_perf_writel(val, reg);
|
||
|
|
msleep(10);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
--- a/arch/mips/bcm63xx/dev-enet.c
|
||
|
|
+++ b/arch/mips/bcm63xx/dev-enet.c
|
||
|
|
@@ -141,7 +141,7 @@ static int __init register_shared(void)
|
||
|
|
shared_res[0].end = shared_res[0].start;
|
||
|
|
shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
|
||
|
|
|
||
|
|
- if (BCMCPU_IS_6368())
|
||
|
|
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6368())
|
||
|
|
chan_count = 32;
|
||
|
|
else
|
||
|
|
chan_count = 16;
|
||
|
|
@@ -224,7 +224,7 @@ bcm63xx_enetsw_register(const struct bcm
|
||
|
|
{
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
- if (!BCMCPU_IS_6368())
|
||
|
|
+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
|
||
|
|
return -ENODEV;
|
||
|
|
|
||
|
|
ret = register_shared();
|
||
|
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
|
||
|
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
|
||
|
|
@@ -368,7 +368,7 @@ struct bcm_enet_priv {
|
||
|
|
|
||
|
|
static inline int bcm_enet_is_sw(struct bcm_enet_priv *priv)
|
||
|
|
{
|
||
|
|
- if (BCMCPU_IS_6368())
|
||
|
|
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6368())
|
||
|
|
return 1;
|
||
|
|
else
|
||
|
|
return 0;
|