59 lines
2.2 KiB
Diff
59 lines
2.2 KiB
Diff
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From d1447a6815913823ef5e75d70efc6f08f288ee40 Mon Sep 17 00:00:00 2001
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From: Xudong Chen <xudong.chen@mediatek.com>
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Date: Wed, 6 May 2015 16:37:05 +0800
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Subject: [PATCH 29/76] dt-bindings: Add I2C bindings for mt65xx/mt81xx.
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Add devicetree bindings for Mediatek Soc I2C driver.
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Signed-off-by: Xudong Chen <xudong.chen@mediatek.com>
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Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
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---
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.../devicetree/bindings/i2c/i2c-mt6577.txt | 41 ++++++++++++++++++++
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1 file changed, 41 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mt6577.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/i2c/i2c-mt6577.txt
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@@ -0,0 +1,41 @@
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+* Mediatek's I2C controller
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+
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+The Mediatek's I2C controller is used to interface with I2C devices.
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+
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+Required properties:
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+ - compatible: value should be either of the following.
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+ (a) "mediatek,mt6577-i2c", for i2c compatible with mt6577 i2c.
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+ (b) "mediatek,mt6589-i2c", for i2c compatible with mt6589 i2c.
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+ (c) "mediatek,mt8127-i2c", for i2c compatible with mt8127 i2c.
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+ (d) "mediatek,mt8135-i2c", for i2c compatible with mt8135 i2c.
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+ (e) "mediatek,mt8173-i2c", for i2c compatible with mt8173 i2c.
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+ - reg: physical base address of the controller and dma base, length of memory
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+ mapped region.
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+ - interrupts: interrupt number to the cpu.
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+ - clock-div: the fixed value for frequency divider of clock source in i2c
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+ module. Each IC may be different.
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+ - clocks: clock name from clock manager
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+ - clock-names: Must include "main" and "dma", if enable have-pmic need include
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+ "pmic" extra.
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+
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+Optional properties:
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+ - clock-frequency: Frequency in Hz of the bus when transfer, the default value
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+ is 100000.
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+ - mediatek,have-pmic: platform can control i2c form special pmic side.
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+ Only mt6589 and mt8135 support this feature.
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+ - mediatek,use-push-pull: IO config use push-pull mode.
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+
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+Example:
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+
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+ i2c0: i2c@1100d000 {
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+ compatible = "mediatek,mt6577-i2c";
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+ reg = <0x1100d000 0x70>,
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+ <0x11000300 0x80>;
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+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
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+ clock-frequency = <400000>;
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+ mediatek,have-pmic;
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+ clock-div = <16>;
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+ clocks = <&i2c0_ck>, <&ap_dma_ck>;
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+ clock-names = "main", "dma";
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+ };
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+
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