ath79: add support for TP-Link Archer D7/D7b v1
TP-Link Archer D7 v1 is a dual-band AC1750 router + modem.
The router section is based on Qualcomm/Atheros QCA9558 + QCA9880.
The "DSL" section is based on BCM6318 but it's currently not supported.
The Archer D7b seems to differ from the Archer D7 only in the
partition table.
Router section - Specification:
775/650/258 MHz (CPU/DDR/AHB)
128 MB of RAM (DDR2)
16 MB of FLASH (SPI NOR)
3T3R 2.4 GHz
3T3R 5 GHz
4x 10/100/1000 Mbps Ethernet
7x LED, 2x button
UART header on PCB
Known issues:
- Broadband LED (missing GPIO - probably driven by the BCM6318)
- Internet LED (missing GPIO - probably driven by the BCM6318)
- WIFI LED (working only for one interface at a time, while in the
OEM firmware works for both wifi interfaces; thus, this patch does
not set a trigger by default)
- DSL not working (eth0)
UART connection
---------------
J1 HEADER (Qualcomm CPU)
. VCC
. GND
. RX
O TX
J41 HEADER (Broadcom CPU)
. VCC
. GND
. RX
O TX
The following instructions require a connection to the J1 UART header
and are tested for the Archer D7 v1.
For the Archer D7b v1, names should be changed accordingly.
Flash instructions under U-Boot, using UART
------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Initramfs instructions under U-Boot for testing, using UART
----------------------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-initramfs-kernel.bin
bootm 0x81000000
4. Here you can backup the original firmware and/or flash the sysupgrade openwrt if you want
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin" of="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod" skip=257 bs=512 count=31872
4. Double check the .mod file size. It must be 16318464 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
[cosmetic DTS changes, remove TPLINK_HWREVADD := 0, do not use two
phyXtpt at once, add missing buttons, minor commit message adjustments]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-01-19 20:05:31 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
|
2020-04-17 00:05:23 +00:00
|
|
|
#include "qca955x.dtsi"
|
ath79: add support for TP-Link Archer D7/D7b v1
TP-Link Archer D7 v1 is a dual-band AC1750 router + modem.
The router section is based on Qualcomm/Atheros QCA9558 + QCA9880.
The "DSL" section is based on BCM6318 but it's currently not supported.
The Archer D7b seems to differ from the Archer D7 only in the
partition table.
Router section - Specification:
775/650/258 MHz (CPU/DDR/AHB)
128 MB of RAM (DDR2)
16 MB of FLASH (SPI NOR)
3T3R 2.4 GHz
3T3R 5 GHz
4x 10/100/1000 Mbps Ethernet
7x LED, 2x button
UART header on PCB
Known issues:
- Broadband LED (missing GPIO - probably driven by the BCM6318)
- Internet LED (missing GPIO - probably driven by the BCM6318)
- WIFI LED (working only for one interface at a time, while in the
OEM firmware works for both wifi interfaces; thus, this patch does
not set a trigger by default)
- DSL not working (eth0)
UART connection
---------------
J1 HEADER (Qualcomm CPU)
. VCC
. GND
. RX
O TX
J41 HEADER (Broadcom CPU)
. VCC
. GND
. RX
O TX
The following instructions require a connection to the J1 UART header
and are tested for the Archer D7 v1.
For the Archer D7b v1, names should be changed accordingly.
Flash instructions under U-Boot, using UART
------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Initramfs instructions under U-Boot for testing, using UART
----------------------------------------------------------
1. Press "tpl" to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d7-v1-initramfs-kernel.bin
bootm 0x81000000
4. Here you can backup the original firmware and/or flash the sysupgrade openwrt if you want
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin" of="Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod" skip=257 bs=512 count=31872
4. Double check the .mod file size. It must be 16318464 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D7v1_1.6.0_0.9.1_up_boot(160216)_2016-02-16_15.55.48.bin.mod
erase 0x9f020000 +f90000
cp.b 0x81000000 0x9f020000 0xf90000
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
[cosmetic DTS changes, remove TPLINK_HWREVADD := 0, do not use two
phyXtpt at once, add missing buttons, minor commit message adjustments]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-01-19 20:05:31 +00:00
|
|
|
|
|
|
|
/ {
|
|
|
|
aliases {
|
|
|
|
led-boot = &led_system;
|
|
|
|
led-failsafe = &led_system;
|
|
|
|
led-running = &led_system;
|
|
|
|
led-upgrade = &led_system;
|
|
|
|
};
|
|
|
|
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
|
|
|
led_system: system {
|
|
|
|
label = "tp-link:white:system";
|
|
|
|
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
|
|
|
|
default-state = "on";
|
|
|
|
};
|
|
|
|
|
|
|
|
wlan {
|
|
|
|
label = "tp-link:white:wlan";
|
|
|
|
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
lan {
|
|
|
|
label = "tp-link:white:lan";
|
|
|
|
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
usb {
|
|
|
|
label = "tp-link:white:usb";
|
|
|
|
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
|
|
|
|
trigger-sources = <&hub_port1>, <&hub_port0>;
|
|
|
|
linux,default-trigger = "usbport";
|
|
|
|
};
|
|
|
|
|
|
|
|
qss {
|
|
|
|
label = "tp-link:white:qss";
|
|
|
|
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
keys {
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
wifi {
|
|
|
|
label = "WiFi button";
|
|
|
|
linux,code = <KEY_RFKILL>;
|
|
|
|
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
wps {
|
|
|
|
label = "WPS button";
|
|
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
|
|
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
reset {
|
|
|
|
label = "Reset button";
|
|
|
|
linux,code = <KEY_RESTART>;
|
|
|
|
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_usb0_vbus: regulator {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "usb_vbus";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_usb1_vbus: regulator {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "usb_vbus";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
gpio = <&gpio 22 GPIO_ACTIVE_HIGH>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&mdio0 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
phy0: ethernet-phy@0 {
|
|
|
|
reg = <0>;
|
|
|
|
|
|
|
|
qca,ar8327-initvals = <
|
|
|
|
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
|
|
|
|
0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
|
|
|
|
0x50 0xc737c737 /* LED_CTRL0 */
|
|
|
|
0x54 0x00000000 /* LED_CTRL1 */
|
|
|
|
0x58 0x00000000 /* LED_CTRL2 */
|
|
|
|
0x5c 0x0030c300 /* LED_CTRL3 */
|
|
|
|
0x7c 0x0000007e /* PORT0_STATUS */
|
|
|
|
0x94 0x0000007e /* PORT6 STATUS */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
ð0 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
phy-handle = <&phy0>;
|
|
|
|
pll-data = <0x56000000 0x00000101 0x00001616>;
|
|
|
|
|
|
|
|
gmac-config {
|
|
|
|
device = <&gmac>;
|
|
|
|
rgmii-enabled = <1>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
ð1 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
pll-data = <0x03000101 0x00000101 0x00001616>;
|
|
|
|
|
|
|
|
fixed-link {
|
|
|
|
speed = <1000>;
|
|
|
|
full-duplex;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&wmac {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb_phy0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb0 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
dr_mode = "host";
|
|
|
|
vbus-supply = <®_usb0_vbus>;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
hub_port0: port@1 {
|
|
|
|
reg = <1>;
|
|
|
|
#trigger-source-cells = <0>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb_phy1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb1 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
dr_mode = "host";
|
|
|
|
vbus-supply = <®_usb1_vbus>;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
hub_port1: port@1 {
|
|
|
|
reg = <1>;
|
|
|
|
#trigger-source-cells = <0>;
|
|
|
|
};
|
|
|
|
};
|