43 lines
1.4 KiB
Diff
43 lines
1.4 KiB
Diff
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From aa9e99f77f92814a0d83af8e6ed3148458d0f611 Mon Sep 17 00:00:00 2001
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Date: Tue, 26 Jul 2016 15:43:43 +0300
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Subject: [PATCH] arm64: KVM: support flushing device memory
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In the current implementation, trying to flush
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memory not covered by the linear map (e.g. device
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memory) causes a crash. Add support for flushing
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"non-normal" memory by explicitly ioremap()-ing
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it when such a case appears and do the cache flush
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through this temporary mapping.
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This allows dropping the special checks for qman
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cacheable region when doing cache flushes.
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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[fixed formatting issue]
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Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
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---
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arch/arm64/include/asm/kvm_mmu.h | 12 ++++++++++--
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1 file changed, 10 insertions(+), 2 deletions(-)
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--- a/arch/arm64/include/asm/kvm_mmu.h
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+++ b/arch/arm64/include/asm/kvm_mmu.h
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@@ -341,8 +341,16 @@ static inline void __invalidate_icache_g
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static inline void __kvm_flush_dcache_pte(pte_t pte)
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{
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if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) {
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- struct page *page = pte_page(pte);
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- kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
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+ if (pfn_valid(pte_pfn(pte))) {
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+ struct page *page = pte_page(pte);
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+
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+ kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE);
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+ } else {
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+ void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE);
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+
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+ kvm_flush_dcache_to_poc(va, PAGE_SIZE);
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+ iounmap(va);
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+ }
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}
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}
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