2020-08-08 14:50:04 +00:00
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From 8df093fe2ae1717389df0dcdc620c02cc35abb21 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Mon, 15 Jun 2020 23:06:05 +0200
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Subject: PCI: qcom: Add ipq8064 rev2 variant
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Ipq8064-v2 have tx term offset set to 0. Introduce this variant to permit
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different offset based on the revision.
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Link: https://lore.kernel.org/r/20200615210608.21469-10-ansuelsmth@gmail.com
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
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---
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drivers/pci/controller/dwc/pcie-qcom.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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--- a/drivers/pci/controller/dwc/pcie-qcom.c
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+++ b/drivers/pci/controller/dwc/pcie-qcom.c
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2020-11-19 15:30:16 +00:00
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@@ -368,7 +368,8 @@ static int qcom_pcie_init_2_1_0(struct q
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2020-08-08 14:50:04 +00:00
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val &= ~BIT(0);
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writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
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- if (of_device_is_compatible(node, "qcom,pcie-ipq8064")) {
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+ if (of_device_is_compatible(node, "qcom,pcie-ipq8064") ||
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+ of_device_is_compatible(node, "qcom,pcie-ipq8064-v2")) {
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writel(PCS_DEEMPH_TX_DEEMPH_GEN1(24) |
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PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(24) |
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PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(34),
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2021-03-04 20:37:13 +00:00
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@@ -1330,6 +1331,7 @@ err_pm_runtime_put:
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2020-08-08 14:50:04 +00:00
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static const struct of_device_id qcom_pcie_match[] = {
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{ .compatible = "qcom,pcie-apq8084", .data = &ops_1_0_0 },
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{ .compatible = "qcom,pcie-ipq8064", .data = &ops_2_1_0 },
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+ { .compatible = "qcom,pcie-ipq8064-v2", .data = &ops_2_1_0 },
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{ .compatible = "qcom,pcie-apq8064", .data = &ops_2_1_0 },
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{ .compatible = "qcom,pcie-msm8996", .data = &ops_2_3_2 },
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{ .compatible = "qcom,pcie-ipq8074", .data = &ops_2_3_3 },
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