Openwrt/target/linux/sunxi/patches-4.1/112-mtd-add-dt-nand-partition-parser.patch

From 0460e9868fd82a3675db02f6ceb6edfd8501c194 Mon Sep 17 00:00:00 2001
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Date: Mon, 28 Jul 2014 14:31:42 +0200
Subject: [PATCH] mtd: nand: Add DT NAND partition parser

Add a of_nandpart_parse function to help parsing NAND partitions from DT.
This function should be called from NAND controller drivers just after the
nand_scan_tail in place of mtd_device_parse_register.
The caller can specify a parser function to retrieve HW specific
informations from the DT.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/mtd/nand/ofnandpart.c | 104 ++++++++++++++++++++++++++++++++++++++++++
 include/linux/mtd/nand.h      |  17 +++++++
 2 files changed, 121 insertions(+)
 create mode 100644 drivers/mtd/nand/ofnandpart.c

--- /dev/null
+++ b/drivers/mtd/nand/ofnandpart.c
@@ -0,0 +1,104 @@
+/*
+ * NAND Flash partitions described by the OF (or flattened) device tree
+ *
+ * Copyright © 2014 Boris BREZILLON <b.brezillon.dev@gmail.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/mtd/mtd.h>
+#include <linux/slab.h>
+#include <linux/mtd/nand.h>
+
+static inline bool node_has_compatible(struct device_node *pp)
+{
+	return of_get_property(pp, "compatible", NULL);
+}
+
+int ofnandpart_parse(struct mtd_info *master,
+		     const struct ofnandpart_data *data)
+{
+	struct device_node *node;
+	const char *partname;
+	struct device_node *pp;
+	int i;
+
+	if (!data)
+		return 0;
+
+	node = data->node;
+	if (!node)
+		return 0;
+
+	i = 0;
+	for_each_child_of_node(node,  pp) {
+		const __be32 *reg;
+		int len;
+		int a_cells, s_cells;
+		uint64_t offset, size;
+		uint32_t mask_flags = 0;
+		struct nand_part *part;
+
+		if (node_has_compatible(pp))
+			continue;
+
+		reg = of_get_property(pp, "reg", &len);
+		if (!reg)
+			continue;
+
+		a_cells = of_n_addr_cells(pp);
+		s_cells = of_n_size_cells(pp);
+		offset = of_read_number(reg, a_cells);
+		size = of_read_number(reg + a_cells, s_cells);
+
+		partname = of_get_property(pp, "label", &len);
+		if (!partname)
+			partname = of_get_property(pp, "name", &len);
+
+		if (of_get_property(pp, "read-only", &len))
+			mask_flags |= MTD_WRITEABLE;
+
+		if (of_get_property(pp, "lock", &len))
+			mask_flags |= MTD_POWERUP_LOCK;
+
+		if (data->parse)
+			part = data->parse(data->priv, master, pp);
+		else
+			part = nandpart_alloc();
+
+		if (IS_ERR(part))
+			continue;
+
+		part->offset = offset;
+		part->master = master;
+		part->mtd.name = partname;
+		part->mtd.size = size;
+		part->mtd.flags = mask_flags;
+
+		if (nand_add_partition(master, part)) {
+			if (part->release)
+				part->release(part);
+			continue;
+		}
+
+		i++;
+	}
+
+	if (!i) {
+		of_node_put(pp);
+		pr_err("No valid partition found on %s\n", node->full_name);
+	}
+
+	return i;
+}
+EXPORT_SYMBOL(ofnandpart_parse);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Parser for NAND flash partitioning information in device tree");
+MODULE_AUTHOR("Boris BREZILLON");
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1014,6 +1014,23 @@ static inline int jedec_feature(struct n
 		: 0;
 }
 
+/**
+ * struct ofnandpart_data - struct used to retrieve NAND partitions from a DT
+ *			    node
+ * @parse:		driver specific parser function
+ * @priv:		driver private data
+ * @node:		OF node containing NAND partitions
+ */
+struct ofnandpart_data {
+	struct nand_part *(*parse)(void *priv, struct mtd_info *master,
+				   struct device_node *pp);
+	void *priv;
+	struct device_node *node;
+};
+
+int ofnandpart_parse(struct mtd_info *master,
+		     const struct ofnandpart_data *data);
+
 /*
  * struct nand_sdr_timings - SDR NAND chip timings
  *