Openwrt/target/linux/brcm47xx/patches-3.10/082-MIPS-BCM47XX-add-EARLY_PRINTK_8250-support.patch

commit 22250a38f970c173acb1b3fb30e6dce1430f697b
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date:   Thu Sep 19 22:48:35 2013 +0200

    MIPS: BCM47XX: add EARLY_PRINTK_8250 support
    
    The BCM47xx SoCs have a 8250 serial compatible console at address
    0x18000300 and an other at 0x18000400. On most devices 0x18000300 is
    wired to some pins on the board, we should use that.
    This is the smae for the AI (bcma) and the SB (ssb) bus, this is some
    offset on the chip common core.
    
    Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -117,6 +117,8 @@ config BCM47XX
 	select NO_EXCEPT_FILL
 	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SYS_HAS_EARLY_PRINTK
+	select EARLY_PRINTK_8250 if EARLY_PRINTK
 	help
 	 Support for BCM47XX based boards
 
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -28,6 +28,8 @@
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
+#include <linux/ssb/ssb_driver_chipcommon.h>
+#include <linux/ssb/ssb_regs.h>
 #include <linux/smp.h>
 #include <asm/bootinfo.h>
 #include <bcm47xx.h>
@@ -94,9 +96,16 @@ static __init void prom_init_mem(void)
 	add_memory_region(0, mem, BOOT_MEM_RAM);
 }
 
+/*
+ * This is the first serial on the chip common core, it is at this position
+ * for sb (ssb) and ai (bcma) bus.
+ */
+#define BCM47XX_SERIAL_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART0_DATA)
+
 void __init prom_init(void)
 {
 	prom_init_mem();
+	setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
 }
 
 void __init prom_free_prom_memory(void)
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -123,6 +123,28 @@ static int bcm47xx_get_invariants(struct
 	return 0;
 }
 
+/*
+ * This is the second serial on the chip common core, it is at this position
+ * for sb (ssb) and ai (bcma) bus.
+ */
+#define BCM47XX_SERIAL1_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART1_DATA)
+
+static void __init bcm47xx_swap_serial_ssb(struct ssb_mipscore *mcore)
+{
+	struct ssb_serial_port port;
+
+	printk(KERN_INFO "Swapping serial ports\n");
+
+	setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL1_ADDR), 0, 0);
+
+	/* swap serial ports */
+	memcpy(&port, &mcore->serial_ports[0], sizeof(port));
+	memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port));
+	memcpy(&mcore->serial_ports[1], &port, sizeof(port));
+
+	printk(KERN_INFO "Serial port were Swapped\n");
+}
+
 static void __init bcm47xx_register_ssb(void)
 {
 	int err;
@@ -142,14 +164,7 @@ static void __init bcm47xx_register_ssb(
 	mcore = &bcm47xx_bus.ssb.mipscore;
 	if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
 		if (strstr(buf, "console=ttyS1")) {
-			struct ssb_serial_port port;
-
-			printk(KERN_DEBUG "Swapping serial ports!\n");
-			/* swap serial ports */
-			memcpy(&port, &mcore->serial_ports[0], sizeof(port));
-			memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
-			       sizeof(port));
-			memcpy(&mcore->serial_ports[1], &port, sizeof(port));
+			bcm47xx_swap_serial_ssb(mcore);
 		}
 	}
 }