85 lines
2.2 KiB
Diff
85 lines
2.2 KiB
Diff
|
From f21f034bd5b288068e1fa35c28d5e48e9ae8cbf5 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Maxime Ripard <maxime.ripard@free-electrons.com>
|
||
|
|
Date: Sat, 22 Feb 2014 22:35:55 +0100
|
||
|
|
Subject: [PATCH] ARM: dt: sun4i: Add A10 SPI controller nodes
|
||
|
|
|
||
|
|
The A10 has 4 SPI controllers that are now supported. Add them in the DT.
|
||
|
|
|
||
|
|
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
|
||
|
|
---
|
||
|
|
arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
|
||
|
|
1 file changed, 44 insertions(+)
|
||
|
|
|
||
|
|
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
|
||
|
|
index 3a5775c..cdd5b72 100644
|
||
|
|
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
|
||
|
|
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
|
||
|
|
@@ -331,6 +331,28 @@
|
||
|
|
#size-cells = <1>;
|
||
|
|
ranges;
|
||
|
|
|
||
|
|
+ spi0: spi@01c05000 {
|
||
|
|
+ compatible = "allwinner,sun4i-a10-spi";
|
||
|
|
+ reg = <0x01c05000 0x1000>;
|
||
|
|
+ interrupts = <10>;
|
||
|
|
+ clocks = <&ahb_gates 20>, <&spi0_clk>;
|
||
|
|
+ clock-names = "ahb", "mod";
|
||
|
|
+ status = "disabled";
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ spi1: spi@01c06000 {
|
||
|
|
+ compatible = "allwinner,sun4i-a10-spi";
|
||
|
|
+ reg = <0x01c06000 0x1000>;
|
||
|
|
+ interrupts = <11>;
|
||
|
|
+ clocks = <&ahb_gates 21>, <&spi1_clk>;
|
||
|
|
+ clock-names = "ahb", "mod";
|
||
|
|
+ status = "disabled";
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
emac: ethernet@01c0b000 {
|
||
|
|
compatible = "allwinner,sun4i-a10-emac";
|
||
|
|
reg = <0x01c0b000 0x1000>;
|
||
|
|
@@ -423,6 +445,17 @@
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
+ spi2: spi@01c17000 {
|
||
|
|
+ compatible = "allwinner,sun4i-a10-spi";
|
||
|
|
+ reg = <0x01c17000 0x1000>;
|
||
|
|
+ interrupts = <12>;
|
||
|
|
+ clocks = <&ahb_gates 22>, <&spi2_clk>;
|
||
|
|
+ clock-names = "ahb", "mod";
|
||
|
|
+ status = "disabled";
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
ahci: sata@01c18000 {
|
||
|
|
compatible = "allwinner,sun4i-a10-ahci";
|
||
|
|
reg = <0x01c18000 0x1000>;
|
||
|
|
@@ -451,6 +484,17 @@
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
+ spi3: spi@01c1f000 {
|
||
|
|
+ compatible = "allwinner,sun4i-a10-spi";
|
||
|
|
+ reg = <0x01c1f000 0x1000>;
|
||
|
|
+ interrupts = <50>;
|
||
|
|
+ clocks = <&ahb_gates 23>, <&spi3_clk>;
|
||
|
|
+ clock-names = "ahb", "mod";
|
||
|
|
+ status = "disabled";
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
intc: interrupt-controller@01c20400 {
|
||
|
|
compatible = "allwinner,sun4i-ic";
|
||
|
|
reg = <0x01c20400 0x400>;
|
||
|
|
--
|
||
|
|
1.8.5.5
|
||
|
|
|