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Openwrt/toolchain/gcc/patches/8.4.0/931-libffi-fix-MIPS-softfloat-build-issue.patch

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toolchain/gcc: add GCC 8.1.0 Changes compared to GCC 7.x 001-revert_register_mode_search.patch dropped The underlying issue is described at the end of https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58139 It is fixed by the upstream commit: https://github.com/gcc-mirror/gcc/commit/3fa2798aa887d141d86985240f03e2f3809e7e62 020-PR-libstdc-81797-Add-.NOTPARALLEL-to-include-Makefil.patch dropped due to already upstream 100-PR-rtl-optimization-83496.patch dropped due to already upstream 910-mbsd_multi.patch modified to fix ambiguous overloaded inform() call error gcc/input.h header: define UNKNOWN_LOCATION ((source_location) 0) - inform (0, "someone does not honour COPTS correctly, passed %d times", - honour_copts); + inform (UNKNOWN_LOCATION, "someone does not honour COPTS correctly, passed %d times", + honour_copts); 940-no-clobber-stamp-bits.patch dropped due to fixed upstream by another way upstream commit: https://github.com/gcc-mirror/gcc/commit/87b2d547f8ac9778d66909b8726fe967d1efbc74 950-cpp_file_path_translation.patch dropped, Both -fmacro-prefix-map and -ffile-prefix-map are added to gcc 8.1.0, if I understand it correctly, we should use -fmacro-prefix-map usage: -fmacro-prefix-map=@var{old}=@var{new} upstream commit: https://github.com/gcc-mirror/gcc/commit/859b51f83662d01e4f158ea9327db9ca37fe70b3 -iremap exists as a flag for a long time, for backward compatibility, I think we should keep the variable name unchanged but change its value in rules.mk for gcc 8.x and higher. Compile and run tested on x86_64 Signed-off-by: Syrone Wong <wong.syrone@gmail.com>
2018-06-21 15:08:10 +00:00
From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001
From: BangLang Huang <banglang.huang@foxmail.com>
Date: Wed, 9 Nov 2016 10:36:49 +0800
Subject: [PATCH] libffi: fix MIPS softfloat build issue
Backported from github.com/libffi/libffi#272
Signed-off-by: BangLang Huang <banglang.huang@foxmail.com>
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
---
libffi/src/mips/n32.S | 17 +++++++++++++++++
libffi/src/mips/o32.S | 17 +++++++++++++++++
2 files changed, 34 insertions(+)
--- a/libffi/src/mips/n32.S
+++ b/libffi/src/mips/n32.S
@@ -107,6 +107,16 @@ loadregs:
REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
+#ifdef __mips_soft_float
+ REG_L a0, 0*FFI_SIZEOF_ARG(t9)
+ REG_L a1, 1*FFI_SIZEOF_ARG(t9)
+ REG_L a2, 2*FFI_SIZEOF_ARG(t9)
+ REG_L a3, 3*FFI_SIZEOF_ARG(t9)
+ REG_L a4, 4*FFI_SIZEOF_ARG(t9)
+ REG_L a5, 5*FFI_SIZEOF_ARG(t9)
+ REG_L a6, 6*FFI_SIZEOF_ARG(t9)
+ REG_L a7, 7*FFI_SIZEOF_ARG(t9)
+#else
and t4, t6, ((1<<FFI_FLAG_BITS)-1)
REG_L a0, 0*FFI_SIZEOF_ARG(t9)
beqz t4, arg1_next
@@ -193,6 +203,7 @@ arg7_next:
arg8_doublep:
l.d $f19, 7*FFI_SIZEOF_ARG(t9)
arg8_next:
+#endif
callit:
# Load the function pointer
@@ -214,6 +225,7 @@ retint:
b epilogue
retfloat:
+#ifndef __mips_soft_float
bne t6, FFI_TYPE_FLOAT, retdouble
jal t9
REG_L t4, 4*FFI_SIZEOF_ARG($fp)
@@ -272,6 +284,7 @@ retstruct_f_d:
s.s $f0, 0(t4)
s.d $f2, 8(t4)
b epilogue
+#endif
retstruct_d_soft:
bne t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
@@ -429,6 +442,7 @@ ffi_closure_N32:
REG_S a6, A6_OFF2($sp)
REG_S a7, A7_OFF2($sp)
+#ifndef __mips_soft_float
# Store all possible float/double registers.
s.d $f12, F12_OFF2($sp)
s.d $f13, F13_OFF2($sp)
@@ -438,6 +452,7 @@ ffi_closure_N32:
s.d $f17, F17_OFF2($sp)
s.d $f18, F18_OFF2($sp)
s.d $f19, F19_OFF2($sp)
+#endif
# Call ffi_closure_mips_inner_N32 to do the real work.
LA t9, ffi_closure_mips_inner_N32
@@ -458,6 +473,7 @@ cls_retint:
b cls_epilogue
cls_retfloat:
+#ifndef __mips_soft_float
bne v0, FFI_TYPE_FLOAT, cls_retdouble
l.s $f0, V0_OFF2($sp)
b cls_epilogue
@@ -500,6 +516,7 @@ cls_retstruct_f_d:
l.s $f0, V0_OFF2($sp)
l.d $f2, V1_OFF2($sp)
b cls_epilogue
+#endif
cls_retstruct_small2:
REG_L v0, V0_OFF2($sp)
--- a/libffi/src/mips/o32.S
+++ b/libffi/src/mips/o32.S
@@ -82,13 +82,16 @@ sixteen:
ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
+#ifndef __mips_soft_float
bnez t0, pass_d # make it quick for int
+#endif
REG_L a0, 0*FFI_SIZEOF_ARG($sp) # just go ahead and load the
REG_L a1, 1*FFI_SIZEOF_ARG($sp) # four regs.
REG_L a2, 2*FFI_SIZEOF_ARG($sp)
REG_L a3, 3*FFI_SIZEOF_ARG($sp)
b call_it
+#ifndef __mips_soft_float
pass_d:
bne t0, FFI_ARGS_D, pass_f
l.d $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
@@ -130,6 +133,7 @@ pass_f_d:
# bne t0, FFI_ARGS_F_D, call_it
l.s $f12, 0*FFI_SIZEOF_ARG($sp) # load $fp regs from args
l.d $f14, 2*FFI_SIZEOF_ARG($sp) # passing double and float
+#endif
call_it:
# Load the function pointer
@@ -158,14 +162,23 @@ retfloat:
bne t2, FFI_TYPE_FLOAT, retdouble
jalr t9
REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
+#ifndef __mips_soft_float
s.s $f0, 0(t0)
+#else
+ REG_S v0, 0(t0)
+#endif
b epilogue
retdouble:
bne t2, FFI_TYPE_DOUBLE, noretval
jalr t9
REG_L t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
+#ifndef __mips_soft_float
s.d $f0, 0(t0)
+#else
+ REG_S v1, 4(t0)
+ REG_S v0, 0(t0)
+#endif
b epilogue
noretval:
@@ -261,9 +274,11 @@ $LCFI7:
li $13, 1 # FFI_O32
bne $16, $13, 1f # Skip fp save if FFI_O32_SOFT_FLOAT
+#ifndef __mips_soft_float
# Store all possible float/double registers.
s.d $f12, FA_0_0_OFF2($fp)
s.d $f14, FA_1_0_OFF2($fp)
+#endif
1:
# Call ffi_closure_mips_inner_O32 to do the work.
la t9, ffi_closure_mips_inner_O32
@@ -281,6 +296,7 @@ $LCFI7:
li $13, 1 # FFI_O32
bne $16, $13, 1f # Skip fp restore if FFI_O32_SOFT_FLOAT
+#ifndef __mips_soft_float
li $9, FFI_TYPE_FLOAT
l.s $f0, V0_OFF2($fp)
beq $8, $9, closure_done
@@ -288,6 +304,7 @@ $LCFI7:
li $9, FFI_TYPE_DOUBLE
l.d $f0, V0_OFF2($fp)
beq $8, $9, closure_done
+#endif
1:
REG_L $3, V1_OFF2($fp)
REG_L $2, V0_OFF2($fp)
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